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Datenblatt-Suchmaschine für elektronische Bauteile |
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Datenblatt-Suchmaschine für elektronische Bauteile |
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AM79C975VCW Datenblatt(PDF) 301 Page - Advanced Micro Devices |
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AM79C975VCW Datenblatt(HTML) 301 Page - Advanced Micro Devices |
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301 / 304 page  Am79C973/Am79C975 301 P R E L I M INARY OnNow Wake-Up Sequence . . . . . . . . . . .103 Operating Ranges . . . . . . . . . . . . . . . .224, 266 Ordering Information . . . . . . . . . . . . . . . . . .28 Other Data Registers . . . . . . . . . . . . . . . . .107 Outline of LAPP Flow . . . . . . . . . . . . . . . .285 Output and Float Delay Timing . . . . . . . . .227 Output Tri-state Delay Timing . . . . . . . . .237 Output Valid Delay Timing . . . . . . . . . . . .237 P PADR . . . . . . . . . . . . . . . . . . . . . . . . . . . . .205 PAR . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .30 Parity . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .30 Parity Error . . . . . . . . . . . . . . . . . . . . . . . . .30 Parity Error Response . . . . . . . . . . . . . .45, 53 Pattern Match RAM . . . . . . . . . . . . . . . . . .105 Pattern Match RAM (PMR) . . . . . . . . . . . .104 PCI Base-Class Register Offset 0Bh . . . . .117 PCI Bus Interface Pins - 3.3 V Signaling . . . . . . . . . . . . . . . . . . .225 PCI Bus Interface Pins - 5 V Signaling . . . . . . . . . . . . . . . . . . . .225 PCI Capabilities Pointer Register Offset 34h . . . . . . . . . . . . . . . . . . . . . . . .120 PCI Capability Identifier Register Offset 40h . . . . . . . . . . . . . . . . . . . . . . . .120 PCI Command Register . . . . . . . . . . . . . . .114 PCI Command Register Offset 04h . . . . . .114 PCI Configuration Registers . . . . . . . . . . . . .108, 112, 113, 213 PCI Configuration Space Layout . . . . . . . .108 PCI Data Register . . . . . . . . . . . . . . . . . . .122 PCI Data Register Offset 47h . . . . . . . . . .122 PCI Device ID Register Offset 02h . . . . . .113 PCI Expansion ROM Base Address Register . . . . . . . . . . . . . . . . . . . . . . . . . .119 PCI Header Type Register Offset 0Eh . . . . . . . . . . . . . . . . . . . . . . . .117 PCI I/O Base Address Register Offset 10h . . . . . . . . . . . . . . . . . . . . . . . .117 PCI I/O Buffer Power (9 Pins) . . . . . . . . . . .38 PCI Interface . . . . . . . . . . . . . . . . . . . . . . . .29 PCI Interrupt Line Register Offset 3Ch . . . . . . . . . . . . . . . . . . . . . . . .120 PCI Interrupt Pin Register . . . . . . . . . . . . .120 PCI Latency Timer Register Offset 0Dh . . . . . . . . . . . . . . . . . . . . . . . .117 PCI MAX_LAT Register Offset 3Fh . . . . .120 PCI Memory Mapped I/O Base Address Register . . . . . . . . . . . . . . . . . . .118 PCI MIN_GNT Register . . . . . . . . . . . . . .120 PCI Next Item Pointer Register Offset 41h . . . . . . . . . . . . . . . . . . . . . . . .120 PCI PMCSR Bridge Support Extensions Register . . . . . . . . . . . . . . . . . . . . . . . . . .122 PCI PMCSR Bridge Support Extensions Register Offset 46h . . . . . . . . . . . . . . . . .122 PCI Power Management Capabilities Register (PMC) . . . . . . . . . . . . . . . . . . . .121 PCI Power Management Control/Status Register (PMCSR) . . . . . . . . . . . . . . . . .121 PCI Programming Interface Register Offset 09h . . . . . . . . . . . . . . . . . . . . . . . .116 PCI Revision ID Register Offset 08h . . . .116 PCI Status Register Offset 06h . . . . . . . . .115 PCI Sub-Class Register Offset 0Ah . . . . . .117 PCI Subsystem ID Register . . . . . . . . . . . .119 PCI Subsystem Vendor ID Register . . . . .119 PCI Vendor ID Register . . . . . . . . . . . . . . .113 PCI Vendor ID Register Offset 00h . . . . . .113 PCI-to-Wire Fast Ethernet system solution . . . . . . . . . . . . . . . . . . . . . . . . . . . .2 PCnet™-FAST III Recommended Magnetics . . . . . . . . . . . . . . . . . . . . . . . .244 PERR . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .30 PG . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .32 PHY Control and Management Block (PCM Block) . . . . . . . . . . . . . . . . . . . . . .192 PHY Management Registers . . . . . . . . . . .219 PHY Management Registers (ANRs) . . . .192 PHY_RST Physical Layer Reset . . . . . . . . .35 PHYSICAL DIMENSIONS . . . . . . . . . . .242 Pin Capacitance . . . . . . . . . . . . . . . . . . . . .226 PIN DESCRIPTIONS . . . . . . . . . . . . . . . . .29 PIN DESIGNATIONS (PQL176) (Am79C973/Am79C975) Listed By Pin Number . . . . . . . . . . . . . . . . . . . . . . . .23 PIN DESIGNATIONS (PQR160) (Am79C973/Am79C975) . . . . . . . . . . . . .22 PIN DESIGNATIONS (PQR160) (Am79C973/Am79C975) Listed By Pin Number . . . . . . . . . . . . . . . . . . . . .22 PIN DESIGNATIONS (PQR160, PQL176) Listed By Group . . . . . . . . . . . . . . . . . . . .24 PIN DESIGNATIONS Listed By Driver Type . . . . . . . . . . . . . . . . . . . . . . . .27 |
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