AD7722ASZ datasheet(14/24 Pages) AD

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REV. B

–14–

AD7722

CIRCUIT DESCRIPTION

The AD7722 ADC employs a

Σ-∆ conversion technique that

converts the analog input into a digital pulse train. The analog

input is continuously sampled by a switched capacitor modulator

at twice the rate of the clock input frequency, 2

× fCLKIN. The

digital data that represents the analog input is in the ones density

of the bit stream at the output of the

Σ-∆ modulator. The modu-

lator outputs a bit stream at a data rate equal to fCLKIN.

Due to the high oversampling rate, which spreads the quantization

noise from 0 to fCLKIN/2, the noise energy contained in the band

of interest is reduced (Figure 9a). To reduce the quantization

noise further, a high order modulator is employed to shape the

noise spectrum so that most of the noise energy is shifted out of

the band of interest (Figure 9b).

The digital filter that follows the modulator provides three main

functions. The filter performs sophisticated averaging on the

1-bit samples from the output of the modulator, while removing

the large out of band quantization noise (Figure 9c). Lastly, the

digital filter reduces the data rate from fCLKIN at the input of the

filter to fCLKIN/64 at the output of the filter. The AD7722 output

data rate, fS, is a little over twice the signal bandwidth, which

guarantees that there is no loss of data in the signal band.

Digital filtering has certain advantages over analog filtering. First,

since digital filtering occurs after the A/D conversion, it can

remove noise injected during the conversion process. Analog

filtering cannot remove noise injected during conversion. Second,

the digital filter combines low pass-band ripple with a steep roll-off

while also maintaining a linear phase response.

BAND OF INTEREST

fCLKIN /2

DIGITAL FILTER CUTOFF FREQUENCY

WHICH EQUALS 97.65kHz (12.5MHz)

BAND OF INTEREST

QUANTIZATION NOISE

fCLKIN /2

BAND OF INTEREST

fCLKIN /2

NOISE SHAPING

Figure 9.

Σ-∆ ADC

The AD7722 employs two finite impulse response (FIR) filters in

series. The first filter is a 384-tap filter that samples the output of

the modulator at fCLKIN. The second filter is a 151-tap half-band

filter that samples the output of the first filter at fCLKIN/32 and

decimates by 2. The implementation of this filter architecture

results in a filter with a group delay of 42 conversions (84 conver-

sions for settling to a full-scale step).

The digital filter provides 6 dB of attenuation at a frequency

(fCLKIN/128) one-half its output rate. With a clock frequency

of 12.5 MHz, the digital filter has a pass-band frequency of

90.625 kHz, a cutoff frequency is 96.92 kHz, and a stop-band

frequency of 104.6875 kHz.

Due to the sampling nature of the digital filter, the filter does not

provide any rejection at integer multiples of its input sampling

frequency. The filter response in Figure 10a shows the unattenu-

ated frequency bands occurring at n

× fCLKIN where n = 1, 2, 3. . . .

At these frequencies, there are frequency bands

± f

3 dB wide

(f3 dB is the –3 dB bandwidth of the digital filter) on either side

of n

× fCLKIN where noise passes unattenuated to the output.

Out-of-band signals coincident with any of the filter images are

aliased into the pass band. However, due to the AD7722’s high

oversampling ratio, these bands occupy only a small fraction of

the spectrum, and most broadband noise is filtered. This means

that the antialias filtering requirements in front of the AD7722

are considerably reduced versus a conventional converter with no

on-chip filtering. Figure 10b shows the frequency response of an

antialias filter. With a –3 dB corner frequency set at fCLKIN/64,

a single-pole filter will provide 36 dB of attenuation at fCLKIN.

Depending on the application, however, it may be necessary to

provide additional antialias filtering prior to the AD7722 to

eliminate unwanted signals from the frequency bands the digital

filter passes. It may also be necessary in some applications to

provide analog filtering in front of the AD7722 to ensure that

differential noise signals outside the band of interest do not

saturate the analog modulator.

1fCLKIN

0dB

2fCLKIN

3fCLKIN

Figure 10a. Digital Filter Frequency Response

OUTPUT

DATA RATE

fCLKIN/64

0dB

fCLKIN

ANTIALIAS FILTER

RESPONSE

REQUIRED

ATTENUATION

Figure 10b. Frequency Response of Antialias Filter

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