www.ams.com/LF-Receiver/AS3932

Revision 1.7

21 - 34

AS3932

Datasheet - Detailed Descr i p ti on

8.3.2 Antenna Damper

The antenna damper allows the chip to deal with higher field strength, it is enabled by register R1<4>. It consists of shunt resistors which

degrade the quality factor of the resonator by reducing the signal at the input of the amplifier. In this way the resonator sees a smaller parallel

resistance (in the band of interest) which degrades its quality factor in order to increase the linear range of the channel amplifier (the amplifier

doesn't saturate in presence of bigger signals). Table 16 shows the bit setup.

8.4 Channel Selector / Demodulator / Data Slicer

When at least one of three gain channel enters initial wake-up state the channel selector makes a decision which gain channel to connect to the

envelope detector. If only one channel is in wake-up state the selection is obvious. If more than one channel enters wake-up state in 256µs

following the first active channel the channel with highest RSSI value is selected. The output signal (amplified LF carrier) of selected channel is

connected to the input of the demodulator.

The performance of the demodulator can be optimized according to bit rate and preamble length as described in Table 17 and Table 18.

If the bit rate gets higher the time constant in the envelop detector must be set to a smaller value. This means that higher noise is injected

because of the wider band. The next table is a rough indication of how the envelop detector looks like for different bit rates. By using proper data

slicer settings it is possible to improve the noise immunity paying the penalty of a longer preamble. In fact if the data slicer has a bigger time

constant it is possible to reject more noise, but every time a transmission occurs, the data slicer need time to settle. This settling time will

influence the length of the preamble. Table 18 gives a correlation between data slicer setup and minimum required preamble length.

Table 16. Antenna Damper Bit Setup

R4<5>

R4<4>

Shunt resistor (parallel to the resonator at 125 kHz)

00

1 k

Ω

01

3 k

Ω

10

9 k

Ω

11

27 k

Ω

Table 17. Bit Setup for the Envelop Detector for Different Symbol Rates

R3<2>

R3<1>

R3<0>

Symbol rate [Manchester symbols/s]

0

0

0

4096

0

0

1

2184

0

1

0

1490

01

1

1130

1

0

0

910

1

0

1

762

1

1

0

655

1

1

1

512

Table 18. Bit Setup for the Data Slicer for Different Preamble Length

R3<5>

R3<4>

R3<3>

Minimum preamble length [ms]

00

0

0.8

00

1

1.15

01

0

1.55

01

1

1.9

10

0

2.3

10

1

2.65

11

0

3

11

1

3.5