PIC24F16KA102T-E datasheet(150/278 Pages) MICROCHIP

150 / 278 page

PIC24F16KA102 FAMILY

DS39927C-page 150

 2008-2011 Microchip Technology Inc.

UxMODE: UARTx MODE REGISTER

R/W-0

U-0

R/W-0

U-0

R/W-0(2)

UARTEN

—

USIDL

IREN(1)

RTSMD

—

UEN1

UEN0

bit 15

bit 8

R/C-0, HC

R/W-0

R/W-0, HC

R/W-0

WAKE

LPBACK

ABAUD

RXINV

BRGH

PDSEL1

PDSEL0

STSEL

bit 7

bit 0

Legend:

C = Clearable bit

HC = Hardware Clearable bit

R = Readable bit

W = Writable bit

U = Unimplemented bit, read as ‘0’

-n = Value at POR

‘1’ = Bit is set

‘0’ = Bit is cleared

x = Bit is unknown

bit 15

UARTEN:

UARTx Enable bit

= UARTx is enabled; all UARTx pins are controlled by UARTx as defined by UEN<1:0>

= UARTx is disabled; all UARTx pins are controlled by port latches; UARTx power consumption is

minimal

bit 14

Unimplemented:

Read as ‘0’

bit 13

USIDL:

Stop in Idle Mode bit

= Discontinue module operation when device enters Idle mode

= Continue module operation in Idle mode

bit 12

IREN:

IrDA® Encoder and Decoder Enable bit(1)

= IrDA encoder and decoder are enabled

= IrDA encoder and decoder are disabled

bit 11

RTSMD:

Mode Selection for UxRTS Pin bit

=UxRTS pin is in Simplex mode

=UxRTS pin is in Flow Control mode

bit 10

Unimplemented:

Read as ‘0’

bit 9-8

UEN<1:0>:

UARTx Enable bits(2)

= UxTX, UxRX and UxBCLK pins are enabled and used; UxCTS pin is controlled by port latches

= UxTX, UxRX, UxCTS and UxRTS pins are enabled and used

= UxTX, UxRX and UxRTS pins are enabled and used; UxCTS pin is controlled by port latches

= UxTX and UxRX pins are enabled and used; UxCTS and UxRTS/UxBCLK pins are controlled by port

latches

bit 7

WAKE:

Wake-up on Start Bit Detect During Sleep Mode Enable bit

= UARTx will continue to sample the UxRX pin; interrupt generated on falling edge, bit is cleared in

hardware on the following rising edge

= No wake-up is enabled

bit 6

LPBACK:

UARTx Loopback Mode Select bit

= Enable Loopback mode

= Loopback mode is disabled

bit 5

ABAUD:

Auto-Baud Enable bit

= Enable baud rate measurement on the next character – requires reception of a Sync field (55h);

cleared in hardware upon completion

= Baud rate measurement is disabled or completed

bit 4

RXINV:

Receive Polarity Inversion bit

= UxRX Idle state is ‘0’

= UxRX Idle state is ‘1’

Note 1:

This feature is only available for the 16x BRG mode (BRGH = 0).

Bit availability depends on pin availability.

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