PIC24F16KA102T-E datasheet(194/278 Pages) MICROCHIP

194 / 278 page

PIC24F16KA102 FAMILY

DS39927C-page 194

 2008-2011 Microchip Technology Inc.

FGS: GENERAL SEGMENT CONFIGURATION REGISTER

FOSCSEL: OSCILLATOR SELECTION CONFIGURATION REGISTER

U-0

R/C-1

—

GSS0

GWRP

bit 7

bit 0

Legend:

R = Readable bit

C = Clearable bit

U = Unimplemented bit, read as ‘0’

-n = Value at POR

‘1’ = Bit is set

‘0’ = Bit is cleared

x = Bit is unknown

bit 7-2

Unimplemented:

Read as ‘0’

bit 1

GSS0:

General Segment Code Flash Code Protection bit

= No protection

= Standard security is enabled

bit 0

GWRP

: General Segment Code Flash Write Protection bit

= General segment may be written

= General segment is write-protected

R/P-1

U-0

R/P-1

IESO

—

FNOSC2

FNOSC1

FNOSC0

bit 7

bit 0

Legend:

R = Readable bit

P = Programmable bit

U = Unimplemented bit, read as ‘0’

-n = Value at POR

‘1’ = Bit is set

‘0’ = Bit is cleared

x = Bit is unknown

bit 7

IESO:

Internal External Switchover bit

= Internal External Switchover mode is enabled (Two-Speed Start-up is enabled)

= Internal External Switchover mode is disabled (Two-Speed Start-up is disabled)

bit 6-3

Unimplemented:

Read as ‘0’

bit 2-0

FNOSC<2:0>:

Oscillator Selection bits

000

= Fast RC Oscillator (FRC)

001

= Fast RC Oscillator with divide-by-N with PLL module (FRCDIV+PLL)

010

= Primary Oscillator (XT, HS, EC)

011

= Primary Oscillator with PLL module (HS+PLL, EC+PLL)

100

= Secondary Oscillator (SOSC)

101

= Low-Power RC Oscillator (LPRC)

110

= 500 kHz Low-Power FRC Oscillator with divide-by-N (LPFRCDIV)

111

= 8 MHz FRC Oscillator with divide-by-N (FRCDIV)

PIC24F16KA102T-E Datenblatt(PDF) 194 Page - Microchip Technology

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