5-73

FAST AND LS TTL DATA

SN54/74LS74A

GUARANTEED OPERATING RANGES

Symbol

Parameter

Min

Typ

Max

Unit

VCC

Supply Voltage

54

74

4.5

4.75

5.0

5.0

5.5

5.25

V

TA

Operating Ambient Temperature Range

54

74

– 55

0

25

25

125

70

°C

IOH

Output Current — High

54, 74

– 0.4

mA

IOL

Output Current — Low

54

74

4.0

8.0

mA

Symbol

Parameter

Limits

Unit

Test Conditions

Symbol

Parameter

Min

Typ

Max

Unit

Test Conditions

VIH

Input HIGH Voltage

2.0

V

Guaranteed Input HIGH Voltage for

All Inputs

VIL

Input LOW Voltage

54

0.7

V

Guaranteed Input LOW Voltage for

All Inputs

VIL

Input LOW Voltage

74

0.8

V

Guaranteed Input LOW Voltage for

All Inputs

VIK

Input Clamp Diode Voltage

– 0.65

– 1.5

V

VCC = MIN, IIN = – 18 mA

VOH

Output HIGH Voltage

54

2.5

3.5

V

VCC = MIN, IOH = MAX, VIN = VIH

or VIL per Truth Table

VOH

Output HIGH Voltage

74

2.7

3.5

V

VCC = MIN, IOH = MAX, VIN = VIH

or VIL per Truth Table

VOL

Output LOW Voltage

54, 74

0.25

0.4

V

IOL = 4.0 mA

VCC = VCC MIN,

VIN = VIL or VIH

per Truth Table

VOL

Output LOW Voltage

74

0.35

0.5

V

IOL = 8.0 mA

VIN = VIL or VIH

per Truth Table

IIH

Input High Current

Data, Clock

Set, Clear

20

40

µA

VCC = MAX, VIN = 2.7 V

IIH

Data, Clock

Set, Clear

0.1

0.2

mA

VCC = MAX, VIN = 7.0 V

IIL

Input LOW Current

Data, Clock

Set, Clear

– 0.4

– 0.8

mA

VCC = MAX, VIN = 0.4 V

IOS

Output Short Circuit Current (Note 1)

– 20

–100

mA

VCC = MAX

ICC

Power Supply Current

8.0

mA

VCC = MAX

Note 1: Not more than one output should be shorted at a time, nor for more than 1 second.

Symbol

Parameter

Limits

Unit

Test Conditions

Symbol

Parameter

Min

Typ

Max

Unit

Test Conditions

fMAX

Maximum Clock Frequency

25

33

MHz

Figure 1

VCC = 5.0 V

CL = 15 pF

tPLH

tPHL

Clock, Clear, Set to Output

13

25

ns

Figure 1

VCC = 5.0 V

CL = 15 pF

tPLH

tPHL

Clock, Clear, Set to Output

25

40

ns

Figure 1

CL = 15 pF

Symbol

Parameter

Limits

Unit

Test Conditions

Symbol

Parameter

Min

Typ

Max

Unit

Test Conditions

tW (H)

Clock

25

ns

Figure 1

VCC = 5.0 V

tW (L)

Clear, Set

25

ns

Figure 2

VCC = 5.0 V

ts

Data Setup Time — HIGH

20

ns

Figure 1

VCC = 5.0 V

ts

Data Setup Time — HIGH

20

ns

Figure 1

CC = 5.0 V

th

Hold Time

5.0

ns

Figure 1