FEDL9470-11-01

LAPIS Semiconductor

ML9470-11/12

7/21

Symbol

Type

Description

DATA_OUT2

O

The 160

When two or more ML9470s are connected in series (cascade connection) in the 1/2

duty dynamic display mode, this pin should be connected to the next ML9470’s

DATA_IN pin.

COM_OUT

O

When tow or more ML9470s are connected in series (cascade connection), this pin

should be connected with all of the slave ML9470’s OSC_IN pins.

COM_A

COM_B

O

O

LCD driving common signals is output from these pins. These pins should be

connected to the COMMON side of the LCD panel.

In the static display mode

- A pulse in phase with the COM_OUT is output from both COM_A and COM_B. In this

- In the 1/2 duty dynamic display mode

The COM_A and COM_B output signals are alternately changed within each

COM_OUT output cycle, resulting in alternate repetition of select and non-select

modes.

SEG1 to

SEG80

O

Display output pins for LCD. Theses pins are connected to the SEGMENT side of the

LCD panel. For the correspondence between the output of these pins and input data,

see Section, “Data Structure”.

—

Bias pins for LCD driver. Through these pins, bias voltages for the LCD are externally

supplied.

—

Supply voltage pin and ground pin.

Note: Built-in schmitt circuit is used for all input pins.