FEDL9479E-02

ML9479E

12/32

125-128

129-132

TEST1

TEST2

I

Pin for testing the IC. These have Internal pull-down resistors.

Use it as it is connected to GND.

155-234

239-318

SEG1

SEG160

O

Outputs for LCD display. Connected to the segment pins on the LCD panel.

In the display off mode, all the outputs are fixed to GND.

143-146

235-238

326-329

COM1

COM4

O

Outputs for LCD display. Connected to the common pin on the LCD panel.

The output pins are located at three positions: both ends of the chip and

between SEG80 and SEG81. Each is connected inside the chip. Use the

COM pins in accordance with the panel to be used.

In the display off mode, all the outputs are fixed to GND.

When the slave is set (M/S=”L”), connecting SYNCB signals enables the

master chip to synchronize with common outputs.

59-65

VDD

-

Power supply pin for logic circuit.

66-72

VLCD

-

Power supply pin for LCD driver.

51-58

GND

-

Ground pin.

29-30

103-104

VDDO

-

VDD output pin.

Use this pin when fixing the mode setting input pin to "H" on the COG.

7-8

133-134

GNDO

-

Ground output pin.

Use this pin when fixing the mode setting input pin to "L" on the COG.

1-6

135-142

147-154

319-325

330-331

DUMMY

-

Floating pin.

At this time, avoid this pin from shorting with pins other than DUMMY in the

wiring on the COG.

*1: For details of the COM and SEG waveform when a duty is selected, refer to "Common waveform" on page

18 and "Common Segment waveform" on page 19 to 23.

*2: Oscillator circuit configuration

• When M/S = "H", OSC I/E = "H"

[Internal Rf oscillation mode]

[External Rf oscillation mode]

OPEN

OSC2

OSC1

OSCR

OSC2

R

ｆ

OSC1

OPEN

OSCR