SAP5SD-B-G1-R datasheet(25/63 Pages) ETC2

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SAP5S / SAP51

Universal Actuator-Sensor Interface IC

Data Sheet

July 17, 2012

the prior written consent of the copyright owner. The information furnished in this publication is PRELIMINARY and subject to

changes without notice.

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3.3. Firmware Area Programming

In order to program one of the 5-bit cells of the Firmware Area (address 4…8) a special master call according

to Table 10 must be applied, followed by a DEXG or WPAR call immediately. Write access to the Firmware

Area is possible as long as the Lock_EE_PRG flag is not set. The write procedure is started after receipt of

the DEXG/WPAR call. Finish of write procedure may be observed at the status register S0 as described

above.

The analogue circuitry trim information (address 9…11) can be written by special test mode operation only.

There is no possibility to read out the E²PROM data directly. However, AS-i-related configuration data like

ID_Code may be read by the respective Read_ID_Code master request.

Table 10: SAP5 E²PROM - User and Firmware Area Programming

Internal

E²PROM

Address

E²PROM Cell Content

Programming Master Calls

A4 … A0

ADRA Master Call

ID1_Bit3 … ID1_Bit0

WID1 Master Call

Not implemented

Synchronous_Data_IO

ID_Bit3 … ID_Bit0

I3 … I0

Set ID Code (RDIO)

1 + DEXG/WPAR 2

Inhibit_Write_ID1

ID2_Bit3 … ID2_Bit0

I3 … I0

Set ID Code 2 (RID1)

1 + DEXG/WPAR 2

P1_Delay_Activation

IO_Bit3 … IO_Bit0

I3 … I0

Set IO Config (RDID)

1 + DEXG/WPAR 2

Lock_EE_PRG

Delay_Mode

Invert_Data_In

Inhibit_BR01

Inhibit_Watchdog

Set Control Code (RID2)

1 +

DEXG/WPAR

P2_Sync_Activation

Ext_Addr_4I/4O_Mode

Parallel_Out_4I/4O

Master_Mode

P0_Watchdog_Activation

Set Control Code 2 (RES)

1 +

DEXG/WPAR

Analogue circuitry trim information

Accessible by ZMDI only

1 according to Table 7

2 according to Table 6 with information bits corresponding to the left-hand column; DEXG if I4=’0’, WPAR if

I4=‘1’. Note: Differing from regular WPAR/DEXG calls, the slave always returns the received data bits I3…I0.

User Area

Firmware Area

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