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SP791 Datenblatt(PDF) 16 Page - Sipex Corporation |
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SP791 Datenblatt(HTML) 16 Page - Sipex Corporation |
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16 / 19 page ![]() SP791DS/08 SP791 Low Power Microprocessor Supervisory with Battery Switch-Over © Copyright 2000 Sipex Corporation 16 Figure 16. Watchdog Flow Diagram Figure 15. Monitoring a Negative Voltage NEGATIVE-GOING V CC TRANSIENTS The SP791 is relatively immune to short-dura- tion negative-going VCC transients resulting from power up, power down, and brownout con- ditions. It is usually undesirable to reset the µP when VCC experiences only small glitches. Typically, a VCC transient that goes 100mV be- low the reset threshold and lasts for 40 µs or less will not cause a reset pulse to be issued. A 100nF bypass capacitor mounted close to the VCC pin provides additional transient immunity. CONNECTING A TIMING CAPACITOR TO THE SWT PIN To prevent timing errors minimize external cur- rent leakage sources at this pin, and locate the capacitor as close to SWT as possible. The sum of PC board leakage + SWT capacitor leakage must be small compared to ±100 nA. WATCHDOG SOFTWARE CONSIDERATIONS A way to help the watchdog timer keep a closer watch on software execution involves setting and resetting the watchdog input at different points in the program, rather than "pulsing" the watchdog input high-low-high or low-high-low. This technique avoids a "stuck" loop where the watchdog timer continues to be reset within the loop, keeping the watchdog from timing out. Figure 16 shows an example flow diagram where the I/O driving the watchdog input is set low at the beginning of the program, set high at the beginning of every subroutine or loop, then set low again when the program returns to the beginning. If the program should "hang" in any subroutine, the I/O is continually set high and the watchdog timer is allowed to time out, caus- ing a reset or interrupt to be issued. MAXIMUM VCC FALL TIME The VCC fall time is limited by the propagation delay of the battery switchover comparator and should not exceed 0.03V/ µs. A standard rule of thumb for filter capacitance on most regulators is on the order of 100 µF per amp of current. When the power supply is shut off or the main battery is disconnected, the associated initial VCC fall rate is just the inverse of 1A/100 µF = 0.01V/ µs. The VCC fall rate decreases with time as VCC falls exponentially, which more than sat- isfies the maximum fall-time requirement. +5V R1 R2 V– PFO +5V 0V VTRIP 0V GND PFI Vcc PFO 5 - 1.25 1.25 - VTRIP R1 R2 = NOTE: VTRIP IS NEGATIVE. Corporation V– START SET WDI LOW SUBROUTINE OR PROGRAM LOOP SET WDI HIGH RETURN END |
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