| Datenblatt-Suchmaschine für elektronische Bauteile |
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HT48RA0A Datenblatt(PDF) 2 Page - Holtek Semiconductor Inc |
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HT48RA0A Datenblatt(HTML) 2 Page - Holtek Semiconductor Inc |
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2 / 31 page ![]() Pin Assignment Pin Description Pin Name I/O Code Option Description PA0~PA7 I/O ¾ Bidirectional 8-bit input/output port with pull-high resistors. Each bit can be de- termined as NMOS output or Schmitt trigger input by software instructions. PB0, PB1 I/O Wake-up or None 2-bit bidirectional input/output lines with pull-high resistors. Each bit can be de- termined as NMOS output or Schmitt trigger input by software instructions. Each bit can also be configured as wake-up input by code option. PB2~PB7 I Wake-up or None 6-bit Schmitt trigger input lines with pull-high resistors. Each bit can be config- ured as a wake-up input by code option. PC0/REM O Level or Carrier Level or carrier output pin PC0 can be set as CMOS output pin or carrier output pin by code option. VDD ¾¾ Positive power supply VSS ¾¾ Negative power supply, ground OSC2 OSC1 I O Crystal or RC OSC1, OSC2 are connected to an RC network or a crystal (determined by code option) for the internal system clock. In the case of RC operation, OSC2 is the output terminal for 1/4 system clock (NMOS open drain output). RES I ¾ Schmitt trigger reset input. Active low. Absolute Maximum Ratings Supply Voltage ...........................VSS -0.3V to VSS+4.0V Storage Temperature ............................ -50°Cto125°C Input Voltage..............................VSS -0.3V to VDD+0.3V Operating Temperature........................... -40°Cto85°C Note: These are stress ratings only. Stresses exceeding the range specified under ²Absolute Maximum Ratings² may cause substantial damage to the device. Functional operation of this device at other conditions beyond those listed in the specification is not implied and prolonged exposure to extreme conditions may affect device reliabil- ity. HT48RA0A Rev. 1.70 2 July 16, 2003 P A 1 P A 0 P B 1 P B 0 P C 0 / R E M V D D O S C 2 O S C 1 V S S R E S P A 2 P A 3 P A 4 P A 5 P A 6 P A 7 P B 2 P B 3 P B 4 P B 5 P A 2 P A 3 P A 4 P A 5 P A 6 P A 7 P B 2 P B 3 P B 4 P B 5 P B 6 P B 7 P A 1 P A 0 P B 1 P B 0 P C 0 / R E M V D D O S C 2 O S C 1 V S S R E S N C N C 2 4 2 3 2 2 2 1 2 0 1 9 1 8 1 7 1 6 1 5 1 4 1 3 1 2 3 4 5 6 7 8 9 1 0 1 1 1 2 2 0 1 9 1 8 1 7 1 6 1 5 1 4 1 3 1 2 1 1 1 2 3 4 5 6 7 8 9 1 0 H T 4 8 R A 0 A 2 4 S O P - A H T 4 8 R A 0 A 2 0 S O P - A |
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