PIIX datasheet(58/122 Pages) INTEL

58 / 122 page

82371FB (PIIX) AND 82371SB (PIIX3)

2.4.11.

INTRP

INTERRUPT PIN (Function 2) (PIIX3)

Address Offset:

3Dh

Default Value:

04h

Attribute:

Read only

This register indicates which PCI interrupt pin is used for the Universal Serial Bus module interrupt. The USB

interrupt is internally ORed to the interrupt controller with the PIRQD# signal.

Bit

Description

7:3

Reserved.

2:0

Serial Bus Module Interrupt Routing. This field is hardwired to 100b to select PIRQD#.

2.4.12.

SBRNUM

SERIAL BUS RELEASE NUMBER (Function 2) (PIIX3)

Address Offset:

60h

Default Value:

00h

Attribute:

Read only

This register contains the release of the Universal Serial Bus Specification with which this Universal Serial

Bus Host Controller module is compliant.

Bit

Description

7:0

Serial Bus Specification Release Number. All other combinations are reserved.

Bits[7:0] Release Number

00h

Pre-release 1.0

10h

Release 1.0

2.4.13.

MSTAT

MISCELLANEOUS STATUS REGISTER (Function 2) (PIIX3)

Address Offset:

−6Bh

Default Value:

01h

Attribute:

Read/Write

This 16-bit register provides miscellaneous control and status for the USB function..

Bit

Description

15:1

Reserved

USB Clock Selection. 1=48 MHz. 0=24 MHz.

PIIX Datenblatt(PDF) 58 Page - Intel Corporation

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