82503 datasheet(19/45 Pages) INTEL

19 / 45 page

82503

Make power supply and ground traces as thick as

possible This will reduce high-frequency cross cou-

pling caused by the inductance of thin traces

Connect logic and chassis ground together

Separate and decouple all of the analog and digital

power supply lines

Close signal paths to ground as close as possible to

their sources to avoid ground loops and noise cross

coupling

Use high-loss magnetic beads on power supply dis-

tribution lines

Crystal

The crystal should be adjacent to the 82503 and

trace lengths should be as short as possible The X1

and X2 traces should be symmetrical

82503 Analog Differential Signals

The differential signals from the 82503 to the trans-

formers

analog front end

and the connectors

should be symmetrical for each pair and as short as

possible Differential signal layout should be per-

formed to a characteristic impedance of 78X (for

AUI) or 100X (for TPE)

As a general rule the trace widths should be one to

three times the distance between the PCB layers to

eliminate excessive trace inductance

The differential signals should also be isolated from

the high speed logic signals on the same layer as

well as on any sublayers of the PCB

Group each of the circuits together but keep them

separate from each other Separate their grounds

In layout the circuitry from the connectors to the

filter network should have the ground plane re-

moved from beneath it This will prevent ground

noise from being induced into the analog front end

All trace bends should not exceed 45 degrees

PACKAGE THERMAL

SPECIFICATIONS

The 82503 Dual Serial Transceiver is specified for

operation when case temperature (TC) is within the

range of 0 Cto a85 C The case temperature can

be measured in any environment to determine if the

82503 is within the specified operating range The

case temperature should be measured at the center

of the top surface opposite the pins

The acceptable operating ambient temperature (TA)

is guaranteed as long as TC is not violated The am-

bient temperature can be calculated from the ija

and ijc from the following equations

TJ e TC a P c ijc

TJ e TA a P c ija

TA e TC b P c (ija b ijc)

Values for ija and ijc are given in Table 4 for the 44-

lead PLCC and 44-lead QFP packages Various val-

ues for ija at different airflows Table 5 shows the

maximum TA allowable (without exceeding TC)at

various airflows

Table 4 Thermal Resistance

( CWatt) ijc and ija

ija vs Airflowftmin (ms)

Package ijc 0

200

400

600

800

1000

(0) (101) (203) (304) (406) (507)

44-Lead

19 57

PLCC

44-Lead

26 98

QFP

Table 5 Maximum TA at Various Airflows

ija vs Airflowftmin (ms)

Package

200

400

600

800

1000

(0)

(101)

(203)

(304)

(406)

(507)

44-Lead

PLCC

44-Lead

QFP

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