ADE7758_15 datasheet(65/72 Pages) AD

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Data Sheet

ADE7758

Rev. E | Page 65 of 72

WAVEFORM MODE REGISTER (0x15)

The waveform sampling mode of the ADE7758 is defined by writing to the WAVMODE register. Table 20 summarizes the functionality of

each bit in the WAVMODE register.

Table 20. WAVMODE Register

Bit

Location

Bit

Mnemonic

Default

Value

Description

0 to 1

PHSEL

These bits are used to select the phase of the waveform sample.

PHSEL[1:0]

Source

Phase A

Phase B

Phase C

Reserved

2 to 4

WAVSEL

These bits are used to select the type of waveform.

WAVSEL[2:0]

Source

Current

Voltage

Active Power Multiplier Output

Reactive Power Multiplier Output

VA Multiplier Output

Others-

Reserved

5 to 6

DTRT

These bits are used to select the data rate.

DTRT[1:0]

Update Rate

26.04 kSPS (CLKIN/3/128)

13.02 kSPS (CLKIN/3/256)

6.51 kSPS (CLKIN/3/512)

3.25 kSPS (CLKIN/3/1024)

VACF

Setting this bit to Logic 1 switches the VARCF output pin to an output frequency that is

proportional to the total apparent power (VA). In the default state, Logic 0, the VARCF pin outputs

a frequency proportional to the total reactive power (VAR).

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