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HIP4080IP Datenblatt(PDF) 5 Page - Intersil Corporation

Teilenummer HIP4080IP
Bauteilbeschribung  80V/2.5A Peak, High Frequency Full Bridge FET Driver
PDF  19 Pages
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Hersteller  INTERSIL [Intersil Corporation]
Direct Link  http://www.intersil.com/cda/home
Logo INTERSIL - Intersil Corporation

HIP4080IP Datenblatt(HTML) 5 Page - Intersil Corporation

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5
Low Level Input Current
IIL
VIN = 0V, Full Operating Conditions
-130
-100
-75
-135
-65
µA
High Level Input Current
IIH
VIN = 5V, Full Operating Conditions
-1
-
+1
-10
+10
µA
INPUT PINS: HEN
Low Level Input Voltage
VIL
Full Operating Conditions
-
-
1.0
-
0.8
V
High Level Input Voltage
VIH
Full Operating Conditions
2.5
-
-
2.7
-
V
Input Voltage Hysteresis
-
35
-
-
-
mV
Low Level Input Current
IIL
VIN = 0V, Full Operating Conditions
-260
-200
-150
-270
-130
µA
High Level Input Current
IIH
VIN = 5V, Full Operating Conditions
-1
-
+1
-10
+10
µA
TURN-ON DELAY PINS: LDEL AND HDEL
LDEL, HDEL Voltage
VHDEL,VIHDEL = ILDEL = -100µA
4.9
5.1
5.3
4.8
5.4
V
GATE DRIVER OUTPUT PINS: ALO, BLO, AHO, AND BHO
Low Level Output Voltage
VOL
IOUT = 100mA
.70
0.85
1.0
0.5
1.1
V
High Level Output Voltage
VCC - VOH IOUT = -100mA
0.8
0.95
1.1
0.5
1.2
V
Peak Pull-up Current
IO+VOUT = 0V
1.7
2.6
3.8
1.4
4.1
A
Peak Pull-down Current
IO-VOUT = 12V
1.7
2.4
3.3
1.3
3.6
A
Electrical Specifications
VDD = VCC = VAHB = VBHB = 12V, VSS = VALS = VBLS = VAHS = VBHS = 0V, RHDEL = RLDEL = 100K,
and TA = 25
oC, Unless Otherwise Specified (Continued)
PARAMETERS
SYMBOL
TEST CONDITIONS
TJ = 25
oC
TJ = - 40
oC
TO 125oC
UNITS
MIN
TYP
MAX
MIN
MAX
Switching Specifications VDD = VCC = VAHB = VBHB = 12V, VSS = VALS = VBLS = VAHS = VBHS = 0V, RHDEL = RLDEL = 10K,
CL = 1000pF, and TA = 25
oC, Unless Otherwise Specified
PARAMETERS
SYMBOL
TEST CONDITIONS
TJ = 25
oC
TJ = - 40
oC
TO 125oC
UNITS
MIN
TYP MAX
MIN
MAX
Lower Turn-off Propagation Delay (IN+/IN- to ALO/BLO)
TLPHL
-
40
70
-
90
ns
Upper Turn-off Propagation Delay (IN+/IN- to AHO/BHO)
THPHL
-
50
80
-
110
ns
Lower Turn-on Propagation Delay (IN+/IN- to ALO/BLO)
TLPLH
RHDEL = RLDEL = 10K
-
45
70
-
90
ns
Upper Turn-on Propagation Delay (IN+/IN- to AHO/BHO)
THPLH
RHDEL = RLDEL = 10K
-
70
110
-
140
ns
Rise Time
Tr
-
10
25
-
35
ns
Fall Time
Tf
-
10
25
-
35
ns
Turn-on Input Pulse Width
TPWIN-ON
RHDEL = RLDEL = 10K
50
-
-
50
-
ns
Turn-off Input Pulse Width
TPWIN-OFF RHDEL = RLDEL = 10K
40
-
-
40
-
ns
Disable Turn-off Propagation Delay
(DIS - Lower Outputs)
TDISLOW
-
45
75
-
95
ns
Disable Turn-off Propagation Delay
(DIS - Upper Outputs)
TDISHIGH
-
55
85
-
105
ns
Disable to Lower Turn-on Propagation Delay
(DIS - ALO and BLO)
TDLPLH
-
35
70
-
90
ns
Refresh Pulse Width (ALO and BLO)
TREF-PW
160
260
380
140
420
ns
Disable to Upper Enable (DIS - AHO and BHO)
TUEN
-
335
500
-
550
ns
HEN-AHO, BHO Turn-off, Propagation Delay
THEN-PHL
RHDEL = RLDEL = 10K
-
35
70
-
90
ns
HEN-AHO, BHO Turn-on, Propagation Delay
THEN-PLH
RHDEL = RLDEL = 10K
-
60
90
-
110
ns
TRUTH TABLE
INPUT
OUTPUT
IN+ > IN-
HEN
DIS
ALO
AHO
BLO
BHO
X
X
10000
1
100110
0
101001
1
000010
0
001000
HIP4080



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