The information in this document is subject to change without notice.

BIPOLAR ANALOG INTEGRATED CIRCUIT

J-FET INPUT LOW-OFFSET DUAL OPERATIONAL AMPLIFIER

Document No. G13907EJ1V0DS00 (1st edition)

Date Published December 1998 N CP(K)

Printed in Japan

DATA SHEET

©

1998

Dual operational amplifier

µPC4094 is a high-speed version of the µPC4092. NEC's unique high-speed PNP

µs under voltage-follower conditions

without an oscillation problem. Zener-zap resistor trimming in the input stage produces excellent offset voltage and

temperature drift characteristics.

With AC performance characteristics that are two times better than conventional bi-FET operation amplifiers, the

µPC4094 is ideal for fast integrators, active filters, and other high-speed circuit applications.

FEATURES

•

Stable operation with 220 pF capacitive load

•

Low input offset voltage and offset voltage

±3 mV (MAX.)

±7

µV/°C (TYP.) temperature drift

•

Very low input bias and offset currents

•

√Hz (TYP.)

•

Output short circuit protection

•

High input impedance ... J-FET Input Stage

•

Internal frequency compensation

•

High slew rate: 25 V/

µs (TYP.)

ORDERING INFORMATION

Part Number

Package

µPC4094C

8-pin plastic DIP (300 mil)

µPC4094G2

8-pin plastic SOP (225 mil)

EQUIVALENT CIRCUIT (1/2 Circuit)

PIN CONFIGURATION

(Top View)

V

+

V

−

OUT

TRIMMED

HIGH SPEED

PNP









PC4094C, 4094G2

1

1

2

3

4

8

7

6

5

V

+

+

−

V

−

2

−

+

µ