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AN2149 Datenblatt(PDF) 3 Page - STMicroelectronics |
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AN2149 Datenblatt(HTML) 3 Page - STMicroelectronics |
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3 / 7 page ![]() Obsolete Product(s) - Obsolete Product(s) 3/7 AN2149 - APPLICATION NOTE When the input voltage rises, the input current flowing into the circuit slowly increases, since the NMOS is conducting. Around the threshold of the CMOS, the PMOS starts conducting and NMOS stops conducting. At that point, the input current reverses direction and starts flowing out of the circuit. As the input voltage continues to increase, the current slowly decreases till the input voltage reaches VCC. While the input remains below VCC, the bulk terminal of the PMOS remains connected to VCC. When the input exceeds VCC by 0.7V, the bulk terminal is switched to the input. This mechanism prevents the input over-voltage from affecting the VCC. 4. ELECTRICAL SPECIFICATION Bus-hold specifications identify the current required to sustain the logic at the threshold levels (Vih and Vih) and the overdrive current required to toggle the logic state of the device when there is a genuine signal from an external driver. The input current levels of a bus-hold circuit should approach zero when the input voltage approaches zero or VCC. As shown in Figure 3, current levels are at the highest near the input toggle point as the bus hold circuit attempts to pull the device away from the threshold region. The Bus hold current is specified as II(HOLD) for sustaining both LOW and HIGH states. For the VCXH family, the sustaining current is normally ±75 mA minimum. II(HOLD) = - 75 mA implies the minimum current the bus hold circuit is guaranteed to sink if a logic LOW input is raised to 0.8V II(HOLD) = + 75 mA implies the minimum current the bus hold circuit is guaranteed to source if a logic HIGH input is lowered to 2.0V II(HOLD) = ± 500 mA implies the maximum current that the external driver has to sink/source to switch a bus-hold input from logic HIGH to LOW or vice versa. Figure 3. Bus Hold Characteristics for VCXH Family at VCC = 3.0V If "n" bus-hold enabled inputs are tied to a data-bus, the bus driver should be capable of driving (n x 500 mA), as the overdrive currents are additive for every bus-hold circuit on a data-bus. 5. EXTERNAL RESISTOR WITH BUS HOLD CIRUITRY Pull-up resistors should not be used with an IC that has bus-hold circuitry on its input pins. Adding a pull- up resistor to a pin with bus-hold will cause higher than necessary current demand on the bus-hold driver. If the pull-up resistor is weak, it would not be able to switch the logic state from initial low to high in the time required. |
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