AN4253 datasheet(28/44 Pages) STMICROELECTRONICS

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HW resource initialization

AN4253

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DocID024255 Rev 2

Code sequence

Set DRUN bit in ME_RUN_PC1 register (enable DRUN in ME_RUN_PC1

configuration)

Set RUN_CFG bit field to 1 in ME_PCTL register of peripherals to

be activated

Peripherals will be activated with next Mode Transition to DRUN

Switch system clock to FMPLL0 (mode transition)

In order to change system clock another mode transition is required. This transition will be

used for enabling the clock gated peripherals that were prepared in previous step.

Code sequence

Set SYSCLK field to 6 in ME_DRUN_MC register (PLL as system

clock)

Write DRUN with Key_1 in ME_MCTL register

Write DRUN with Key_2 in ME_MCTL register

Wait mode transition to finish (ME_GS.MTRANS bit = 0)

Read ME.GS register and check that SYSCLK field equals to 4

(FMPLL0)

If not > go to CLK_Fault_Handler

7.7

CLK fault handler

It is up to an application what to do in case of a problem with system clock initialization.

There might be several reasons for the failure of the initialization

•

Crystal oscillator does not start

•

Crystal oscillator starts at wrong frequency

•

FMPLL0 does not lock (here software watchdog expires and trigger reset earlier than

going to CLK fault handler)

The standard solution might be to ask for reset to try initialization from the very beginning

again.

7.8

Software Watchdog Timer (SWT) disable

Depending on the Option byte configuration in the shadow Flash memory the software

watchdog is enabled after the reset or disabled. SWT module always runs on IRC_16 MHz

clock base.

It is recommended to leave it enabled after the reset up to this point as it monitors

progression of the startup code and hardware initialization. Any fault leading to lockup

situation in the previous steps will finish in a reset event caused by SWT expiration event.

The reason why the software watchdog is going to be disabled here is time needed for HW

initialization (mainly contribution of clock initialization) plus RAM memory initialization that

takes significant time. Both contributors can take longer than it is a default SWT expiration

time.

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