PD16449_15 datasheet(9/30 Pages) RENESAS

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Data Sheet S15677EJ1V0DS

µµµµPD16449

4. PIN FUNCTIONS

Symbol

Pin Name

Pad No.

I/O

Description

C1 to C3

Video signal input

1 to 3, 4 to 6,

7 to 9

Input

Input R, G, and B video signals.

H1 to H300

Video signal output

65 to 304

Output

Video signal output pins. Output sampled and held video signals during

horizontal period.

STHR,

STHL

Cascade I/O

46, 47

16 to 18

I/O

Start pulse I/O pins of sample hold timing. STHR serves as an input

pin and STHL, as an output pin, in the case of right shift. In the case of

left shift, STHL serves as an input pin, and STHR, as an output pin.

CLI1 to

CLI3

Shift clock input

34 to 38,

37 to 39,

40 to 42

Input

A start pulse is read at the rising edge of CLI1. Sampling pulse SHPn

is generated at the rising edge of CLI1 through CLI3 during successive

sampling, and at the rising edge of CLI1 during simultaneous sampling

(for details, refer to the Timing charts in 5. FUNCTIONAL

DESCRIPTION).

INH

Inhibit input

31 to 33

Input

Selects a multiplexer and one of the two sample and hold circuits at the

falling edge.

RESET

Reset input

28 to 30

Input

Resets the select counter of the multiplexer and the selector circuit of

the two sample and hold circuits when it goes high. After reset, the

multiplexer is turned OFF, so sure to input one pulse of the INH signal

before inputting the video signal. If the video signal is input without the

INH signal, sampling is not executed.

Four types of color filter arrays can be supported by combination of

MP/TH and MP/1.5.

Mode

MP/TH

MP/1.5

MP/TH

Multiplexer circuit

select input (1)

19 to 21

Input

Vertical stripe array

Single-side delta array

Mosaic array

Double-side delta array

MP/1.5

Multiplexer circuit

select input (2)

22 to 24

Input

R,/L

Shift direction

select input

25 to 27

Input

R,/L = H: Right shift: STHR

→ H1 → H240 → STHL

R,/L = L: Left shift: STHL

→ H240 → H1 → STHR

VDD1

Logic power supply

13 to 15

−

3.0 to 5.5 V

VDD2

Driver power

supply

10 to 12

−

5.0 V

± 0.5 V

VSS1

Logic ground

49 to 51

−

Connect this pin to ground of system.

VSS2

Driver ground

52 to 57

−

Connect this pin to ground of system.

TEST

Test

43 to 45

−

Fix this pin to low level.

Dummy

48, 58 to 64,

305 to 311

−

No dummy pins are connected with other pins inside IC.

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