UM1759 datasheet(21/50 Pages) STMICROELECTRONICS

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UM1759

Hardware description

The WM-Bus protocol stack is developed on ST’s dual chip platform The SPIRIT1 is just

implementing part of the WM-Bus physical layer, the PHY and LINK firmware stack layers

are implemented STM32L15x, Ultra low power ARM Cortex-M3.

STM32L role

•

WM-Bus Application Layer

–

Wireless M-Bus application layer partially implements the EN13757-3.

•

WM-Bus Link Layer

–

MAC packet and CRC handling

–

Encryption/ Decryption initiate/read.

•

WM-Bus PHY

–

Init PHY for WM-Bus

–

Interrupt Services

SPIRIT1 role

•

WM-Bus Modes

•

Header, Sync and trailer fields

•

Manchester/3-out-of-6-encoding

•

Sync detection

•

Tx and RX FIFO

3V3

Pin#8 (VccRF)

PC.2

Pin#9 (SDN)

3V3

Pin#10 (VccRF)

Table 3. Evaluation board connection with connector J7

Evaluation board

SPIRIT1 module (J7)

GND

Pin#1 (GND)

GND

Pin#2 (GND)

Px.x (SPI_CS)

Pin#3(CS/NSS)

Px.x

Pin#4 (GPIO_3)

Px.x (SPI_SCK)

Pin#5 (CLK)

Px.x

Pin#6 (GPIO_2)

Px.x (SPI_MOSI)

Pin#7 (SDI)

Px.x

Pin#8 (GPIO_1)

Px.x (SPI_MISO)

Pin#9 (SDO)

Px.x

Pin#10 (GPIO_0)

Table 2. Evaluation board connection with connector J6

Evaluation board

SPIRIT1 module (J6)

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