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LTC1290BCSW Datenblatt(PDF) 24 Page - Linear Technology |
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LTC1290BCSW Datenblatt(HTML) 24 Page - Linear Technology |
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24 / 28 page ![]() 24 LTC1290 S APPLICATI I FOR ATIO larger current limiting resistors. Use 1N4148 diode clamps from the MUX inputs to VCC and V – if the value of the series resistor will not allow the maximum clock speeds to be used or if an unknown source is used to drive the LTC1290 MUX inputs. How the various power supplies to the LTC1290 are applied can also lead to overvoltage conditions. For single supply operation (i.e., unipolar mode), if VCC and REF+ are not tied together, then VCC should be turned on first, then REF+. If this sequence cannot be met, connecting a diode from REF+ to VCC is recommended (see Figure 21). For dual supplies (bipolar mode) placing two Schottky diodes from VCC and V– to ground (Figure 23) will prevent power supply reversal from occuring when an input source is applied to the analog MUX before power is applied to the device. Power supply reversal occurs, for example, if the input is pulled below V– then VCC will pull a diode drop below ground which could cause the device not to power up properly. Likewise, if the input is pulled above VCC then V– will be pulled a diode drop above ground. If no inputs are present on the MUX, the Schottky diodes are not required if V– is applied first, then VCC. Because a unique input protection structure is used on the digital input pins, the signal levels on these pins can exceed the device VCC without damaging the device. 5V 1290 F21 REF+ VCC LTC1290 22 µF 1N4148 VREF 14 20 5V 1290 F22 DGND V – AGND VCC LTC1290 –5V 0.1 µF 22 µF 1N5817 1N5817 Figure 21 Figure 22. Power Supply Reversal S APPLICATI TYPICAL A “Quick Look” Circuit for the LTC1290 Users can get a quick look at the function and timing of the LTC1290 by using the following simple circuit. REF+ and DIN are tied to VCC selecting a 5V input span, CH7 as a single-ended input, unipolar mode, MSB-first format and 16-bit word length. ACLK and SCLK are tied together and driven by an external clock. CS is driven at 1/128 the clock rate by the CD4520 and DOUT outputs the data. All other pins are tied to a ground plane. The output data from the DOUT pin can be viewed on an oscilloscope which is set up to trigger on the falling edge of CS. A “Quick Look” Circuit for the LTC1290 1290 TA02 LTC1290 0.1 µF 22 µF f CHO CH1 CH2 CH3 CH4 CH5 CH6 CH7 COM DGND VIN TO OSCILLOSCOPE CD4520 CLK EN Q1 Q2 Q3 Q4 RESET VSS VDD RESET Q4 Q3 Q2 Q1 EN CLK CLOCK IN 2MHz MAX 5V VCC ACLK SCLK DIN DOUT CS REF+ REF– V– AGND f/128 |
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