2.7A, 1MHz, Low-Voltage, Step-Down Regulator with

Internal Synchronous Rectification in QFN Package

6

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Detailed Description

The MAX1843 synchronous, current-mode, constant-off-

time, PWM DC-DC converter steps down input voltages

of +3V to +5.5V to a preset output voltage of +2.5V,

+1.8V, or +1.5V, or to an adjustable output voltage from

Internal switches composed of a 0.09

Ω PMOS power

switch and a 0.07

Ω NMOS synchronous-rectifier switch

improve efficiency, reduce component count, and elimi-

nate the need for an external Schottky diode.

The MAX1843 optimizes efficiency by operating in con-

stant-off-time mode under heavy loads and in Maxim’s

proprietary idle mode under light loads. A single resistor-

programmable constant-off-time control sets switching

frequencies up to 1MHz, allowing the user to optimize

performance trade-offs in efficiency, switching noise,

component size, and cost. Under low-dropout conditions,

the device operates in a 100% duty-cycle mode, where

the PMOS switch remains continuously on. Idle mode

enhances light-load efficiency by skipping cycles, thus

reducing transition and gate-charge losses.

When power is drawn from a regulated supply, constant-

off-time PWM architecture essentially provides constant-

frequency operation. This architecture has the inherent

advantage of quick response to line and load transients.

The MAX1843’s current-mode, constant-off-time PWM

architecture regulates the output voltage by changing

the PMOS switch on-time relative to the constant off-

time. Increasing the on-time increases the peak induc-

tor current and the amount of energy transferred to the

load per pulse.

Modes of Operation

The current through the PMOS switch determines the

mode of operation: constant-off-time mode (for load

currents greater than half the idle mode threshold, of

idle mode), or idle mode (for load currents less than

half the idle-mode threshold). Current sense is

achieved through a proprietary architecture that elimi-

Pin Description

NAME

FUNCTION

2, 4

IN

Supply Voltage Input—for the internal PMOS power switch

PIN

3, 18, 19,

23, 25

LX

Connection for the drains of the PMOS power switch and NMOS synchronous-rectifier switch. Connect

the inductor from this node to the output filter capacitor and load.

6

SS

Soft-Start. Connect a capacitor from SS to GND to limit inrush current during startup.

7

COMP

Integrator Amplifier section.

8

TOFF

Off-Time Select Input. Sets the PMOS power switch off-time during constant-off-time operation. Connect a

resistor from TOFF to GND to adjust the PMOS switch off-time.

9

FB

Feedback Input—for both preset-output and adjustable-output operating modes. Connect directly to

output for fixed-voltage operation or to a resistive divider for adjustable operating modes.

13, back-

side pad

GND

Analog Ground. Connect exposed backside pad to pin 13.

14

REF

Reference Output. Bypass REF to GND with a 1µF capacitor.

15

FBSEL

Feedback Select Input. Selects output voltage. See Table 2 for programming instructions.

16

Ω and 2.2µF low-

pass filter. See Figure 1.

17, 20, 21

PGND

Power Ground. Internally connected to the internal NMOS synchronous-rectifier switch.

1, 5, 10,

11, 12,

22, 24,

26, 28

N.C.

Not internally connected.

27

SHDN

Shutdown Control Input. Drive SHDN low to disable the reference, control circuitry, and internal