PIC17C752-08SLASHP datasheet(33/320 Pages) MICROCHIP

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Preliminary

DS30264A-page 33

PIC17C75X

6.3

Peripheral Interrupt Request

Register1 (PIR1) and Register2 (PIR2)

These registers contains the individual ﬂag bits for the

peripheral interrupts.

Note: These bits will be set by the speciﬁed con-

dition, even if the corresponding interrupt

enable bit is cleared (interrupt disabled), or

the GLINTD bit is set (all interrupts dis-

abled). Before enabling an interrupt, the

user may wish to clear the interrupt ﬂag to

ensure that the program does not immedi-

ately branch to the peripheral interrupt ser-

vice routine.

FIGURE 6-5: PIR1 REGISTER (ADDRESS: 16h, BANK 1)

R/W - 0

R - 1

R - 0

RBIF

TMR3IF TMR2IF TMR1IF

CA2IF

CA1IF

TX1IF RC1IF

R = Readable bit

W = Writable bit

-n = Value at POR reset

bit7

bit0

bit 7:

RBIF: PORTB Interrupt on Change Flag bit

1 = One of the PORTB inputs changed (software must end the mismatch condition)

0 = None of the PORTB inputs have changed

bit 6:

TMR3IF:TMR3 Interrupt Flag bit

If Capture1 is enabled (CA1/PR3 = 1)

1 = TMR3 overﬂowed

0 = TMR3 did not overﬂow

If Capture1 is disabled (CA1/PR3 = 0)

1 = TMR3 value has rolled over to 0000h from equalling the period register (PR3H:PR3L) value

0 = TMR3 value has not rolled over to 0000h from equalling the period register (PR3H:PR3L) value

bit 5:

TMR2IF:TMR2 Interrupt Flag bit

1 = TMR2 value has rolled over to 0000h from equalling the period register (PR2) value

0 = TMR2 value has not rolled over to 0000h from equalling the period register (PR2) value

bit 4:

TMR1IF:TMR1 Interrupt Flag bit

If TMR1 is in 8-bit mode (T16 = 0)

1 = TMR1 value has rolled over to 0000h from equalling the period register (PR1) value

0 = TMR1 value has not rolled over to 0000h from equalling the period register (PR1) value

If Timer1 is in 16-bit mode (T16 = 1)

1 = TMR2:TMR1 value has rolled over to 0000h from equalling the period register (PR2:PR1) value

0 = TMR2:TMR1 value has not rolled over to 0000h from equalling the period register (PR2:PR1) value

bit 3:

CA2IF: Capture2 Interrupt Flag bit

1 = Capture event occurred on RB1/CAP2 pin

0 = Capture event did not occur on RB1/CAP2 pin

bit 2:

CA1IF: Capture1 Interrupt Flag bit

1 = Capture event occurred on RB0/CAP1 pin

0 = Capture event did not occur on RB0/CAP1 pin

bit 1:

TX1IF: USART1 Transmit Interrupt Flag bit (State controlled by hardware)

1 = USART1 Transmit buffer is empty

0 = USART1 Transmit buffer is full

bit 0:

RC1IF: USART1 Receive Interrupt Flag bit (State controlled by hardware)

1 = USART1 Receive buffer is full

0 = USART1 Receive buffer is empty

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