4

3

2

1

A

B

C

D

BYP

SW

PVIN

SVIN

LDO2

LDO1

LDO3

FB

BYPOUT

SGND

PGND

Top View

LM3280

SNOSAU4B – OCTOBER 2006 – REVISED FEBRUARY 2013

www.ti.com

Connection Diagrams

Figure 2. 16–Bump DSBGA Package, Large Bump

See Package Number YZR0016QQA

Pin Descriptions

Pin #

Name

Description

A1

LDO1

LDO1 Output.

B1

LDO2

LDO2 Output.

C1

LDO3

LDO3 Output.

D1

turning LDO3 off, set low.

A2

SVIN

Analog, Signal, and LDO Supply Input.

B2

FB

Buck Converter Feedback Analog Input. Connect to the output at the output filter capacitor.

C2

turning LDO2 off, set low.

D2

not leave floating.

A3

SGND

Analog, Signal, and LDO Ground.

B3

Buck Converter Enable Input. Set this digital input high after Vin >2.7V for normal operation. For shutdown,

set low.

C3

turning LDO1 off, set low.

D3

BYP

Forced Bypass Input. Use this digital input to command operation in Bypass mode. Set BYP low (<0.4V) for

normal operation.

A4

BYPOUT

Bypass FET Drain. Connect to the output capacitor. Do not leave floating.

B4

PVIN

Buck Converter Power Supply Voltage Input to the internal PFET switch and Bypass FET.

C4

SW

Buck Converter Switch Node connection to the internal PFET switch and NFET synchronous rectifier.

Connect to an inductor with a saturation current rating that exceeds the maximum Switch Peak Current Limit

of the PWM Buck Converter.

D4

PGND

Buck Converter Power Ground.

These devices have limited built-in ESD protection. The leads should be shorted together or the device placed in conductive foam

during storage or handling to prevent electrostatic damage to the MOS gates.

2

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