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ML4876ER Datenblatt(PDF) 2 Page - Micro Linear Corporation

Teilenummer ML4876ER
Bauteilbeschribung  LCD Backlight Lamp Driver with Contrast
PDF  9 Pages
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Hersteller  MICRO-LINEAR [Micro Linear Corporation]
Direct Link  http://www.microlinear.com
Logo MICRO-LINEAR - Micro Linear Corporation

ML4876ER Datenblatt(HTML) 2 Page - Micro Linear Corporation

  ML4876ER Datasheet HTML 1Page - Micro Linear Corporation ML4876ER Datasheet HTML 2Page - Micro Linear Corporation ML4876ER Datasheet HTML 3Page - Micro Linear Corporation ML4876ER Datasheet HTML 4Page - Micro Linear Corporation ML4876ER Datasheet HTML 5Page - Micro Linear Corporation ML4876ER Datasheet HTML 6Page - Micro Linear Corporation ML4876ER Datasheet HTML 7Page - Micro Linear Corporation ML4876ER Datasheet HTML 8Page - Micro Linear Corporation ML4876ER Datasheet HTML 9Page - Micro Linear Corporation  
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ML4876
2
PIN CONFIGURATION
PIN DESCRIPTION
PIN
NAME
DESCRIPTION
1
FEA OUT
Output of flyback (contrast) error
amplifier
2
FEA–
Negative input of flyback
(contrast) error amplifier
3
FEA+
Positive input of flyback (contrast)
error amplifier
4
L ON
Logic input. A ”0“ on this pin
disables the lamp driver section
only
5
VREF
Voltage reference output
6
ON/OFF
Logic input. A ”0“ on this pin
disables the linear regulator
7
LEA–
Negative input for lamp error
amplifier
8
LEAOUT
Output of lamp error amplifier
9CT
Oscillator timing capacitor
10
L RTD
Input to resonant threshold detector
PIN
NAME
DESCRIPTION
11
B SYNC OUT
Output of MOSFET driver.
Connects to gate of synchronous
FET catch diode.
12
F GATE
Connects to gate of MOSFET in
primary side of contrast control
13
VDD
Output of linear regulator. Positive
power for IC.
14
L GATE1
Output of MOSFET driver.
Connection to gate of one side of
inverter FET drive pair
15
HVDD
Battery power input to linear
regulator
16
L GATE2
Output of MOSFET driver.
Connection to gate of one side of
inverter FET drive pair
17
GND
Ground
18
B ON
Connection to primary side of gate
pulse transformer
19
B OFF
Output of MOSFET driver.
Connection to gate of FET that
disables the input power.
20
F ILIM
Input to current limit comparator
F ILIM
B OFF
B ON
GND
L GATE2
HVDD
L GATE1
VDD
F GATE
B SYNC OUT
1
2
3
4
5
6
7
8
9
10
20
19
18
17
16
15
14
13
12
11
FEA OUT
FEA–
FEA+
L ON
VREF
ON/OFF
LEA–
LEA OUT
CT
L RTD
TOP VIEW
ML4876
20-Pin SSOP (R20)



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