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AR0134CSSC00SUEAH-GEVB Datenblatt(PDF) 24 Page - ON Semiconductor

Teilenummer AR0134CSSC00SUEAH-GEVB
Bauteilbeschribung  Inch 1.2 Mp CMOS Digital Image Sensor with Global Shutter
PDF  41 Pages
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Hersteller  ONSEMI [ON Semiconductor]
Direct Link  http://www.onsemi.com
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AR0134CSSC00SUEAH-GEVB Datenblatt(HTML) 24 Page - ON Semiconductor

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AR0134_DS Rev. G Pub. 6/15 EN
24
©Semiconductor Components Industries, LLC,2015.
AR0134: 1/3-Inch 1.2 Mp CMOS Digital Image Sensor
Electrical Specifications
I/O Timing
By default, the AR0134 launches pixel data, FV and LV with the falling edge of PIXCLK.
The expectation is that the user captures DOUT[11:0], FV and LV using the rising edge of
PIXCLK. The launch edge of PIXCLK can be configured in register R0x3028. See Figure 15
and Table 6 for I/O timing (AC) characteristics.
Figure 15:
I/O Timing Diagram
Table 6:
I/O Timing Characteristics, Parallel Output (1.8V VDD_IO)1
Symbol
Definition
Condition
Min
Typ
Max
Unit
fEXTCLK
Input clock frequency
650
MHz
tEXTCLK
Input clock period
20
166
ns
tR
Input clock rise time
PLL enabled
3ns
tF
Input clock fall time
PLL enabled
3ns
tjJITTER
Input clock jitter
600
ns
tcp
EXTCLK to PIXCLK propagation
delay
Nominal voltages, PLL disabled,
PIXCLK slew rate = 4
5.7
14.3
ns
tRP
PIXCLK rise time
PCLK slew rate = 6
1.3
4.0
ns
tFP
PIXCLK fall time
PCLK slew rate = 6
1.3
3.9
ns
PIXCLK duty cycle
40
50
60
%
fPIXCLK
PIXCLK frequency
PIXCLK slew rate = 6,
Data slew rate = 7
6
74.25
MHz
tPD
PIXCLK to data valid
PIXCLK slew rate = 6,
Data slew rate = 7
-2.5
2
ns
tPFH
PIXCLK to FV HIGH
PIXCLK slew rate = 6,
Data slew rate = 7
-2.5
2
ns
tPLH
PIXCLK to LV HIGH
PIXCLK slew rate = 6,
Data slew rate = 7
-3
1.5
ns
tPFL
PIXCLK to FV LOW
PIXCLK slew rate = 6,
Data slew rate = 7
-2.5
2
ns
tPLL
PIXCLK to LV LOW
PIXCLK slew rate = 6,
Data slew rate = 7
-3
1.5
ns
CIN
Input pin capacitance
2.5
pf
Data[11:0]
LINE_VALID/
PIXCLK
EXTCLK
tR
tEXTCLK
tF
FRAME_VALID leads LINE_VALID by 6 PIXCLKs.
FRAME_VALID trails
LINE_VALID by 6 PIXCLKs.
tPLH
tPFH
tPFL
tPLL
tPD
Pxl _0
Pxl _1
Pxl _2
Pxl _n
90%
10%
tRP
tFP
90%
10%
FRAME_VALID



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