PIC16F72SLASHML datasheet(20/136 Pages) MICROCHIP

20 / 136 page

PIC16F72

DS39597B-page 18

 2002 Microchip Technology Inc.

2.3

PCL and PCLATH

The program counter (PC) specifies the address of the

instruction to fetch for execution. The PC is 13-bits

wide. The low byte is called the PCL register. This reg-

ister is readable and writable. The high byte is called

the PCH register. This register contains the PC<12:8>

bits and is not directly readable or writable. All updates

to the PCH register go through the PCLATH register.

Figure 2-3 shows the four situations for the loading of

the PC.

• Example 1 shows how the PC is loaded on a write

to PCL (PCLATH<4:0>

→ PCH).

• Example 2 shows how the PC is loaded during a

GOTO

instruction (PCLATH<4:3>

→ PCH).

• Example 3 shows how the PC is loaded during a

CALL

instruction (PCLATH<4:3>

→ PCH), with

the PC loaded (PUSH’d) onto the Top-of-Stack.

• Example 4 shows how the PC is loaded during

one of the return instructions, where the PC is

loaded (POP’d) from the Top-of-Stack.

FIGURE 2-3:

LOADING OF PC IN DIFFERENT SITUATIONS

PCLATH<4:0>

PCLATH

ALU result

Opcode <10:0>

11 10

PCLATH<4:3>

PCH

PCL

PCLATH

PCH

PCL

Example 1 - Instruction with PCL as destination

Example 2 - GOTO Instruction

Stack (13-bits x 8)

Top-of-Stack

Stack (13-bits x 8)

Top-of-Stack

Opcode <10:0>

11 10

PCLATH<4:3>

PCLATH

PCH

PCL

Example 3 - CALL Instruction

Stack (13-bits x 8)

Top-of-Stack

Opcode <10:0>

11 10

PCLATH

PCH

PCL

Example 4 - RETURN, RETFIE, or RETLW Instruction

Stack (13-bits x 8)

Top-of-Stack

Note: PCLATH is not updated with the contents of PCH.

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