AX88196 datasheet(16/42 Pages) ASIX

16 / 42 page

AX88196

Local CPU BUS MAC Controller

ASIX ELECTRONICS CORPORATION

4.0 Registers Operation

All registers of MAC Core are 8-bit wide and mapped into pages which are selected by PS in the

Command Register.

PAGE 0 (PS1=0,PS0=0)

OFFSET

READ

WRITE

00H

Command Register

( CR )

Command Register

( CR )

01H

Page Start Register

( PSTART )

Page Start Register

( PSTART )

02H

Page Stop Register

( PSTOP )

Page Stop Register

( PSTOP )

03H

Boundary Pointer

( BNRY )

Boundary Pointer

( BNRY )

04H

Transmit Status Register

( TSR )

Transmit Page Start Address

( TPSR )

05H

Number of Collisions Register

( NCR )

Transmit Byte Count Register 0

( TBCR0 )

06H

Current Page Register

( CPR )

Transmit Byte Count Register 1

( TBCR1 )

07H

Interrupt Status Register

( ISR )

Interrupt Status Register

( ISR )

08H

Current Remote DMA Address 0

( CRDA0 )

Remote Start Address Register 0

( RSAR0 )

09H

Current Remote DMA Address 1

( CRDA1 )

Remote Start Address Register 1

( RSAR1 )

0AH

Reserved

Remote Byte Count 0

( RBCR0 )

0BH

Reserved

Remote Byte Count 1

( RBCR1 )

0CH

Receive Status Register

( RSR )

Receive Configuration Register

( RCR )

0DH

Frame Alignment Errors

( CNTR0 )

Transmit Configuration Register ( TCR )

0EH

CRC Errors

( CNTR1 )

Data Configuration Register

( DCR )

0FH

Missed Packet Errors

( CNTR2 )

Interrupt Mask Register

( IMR )

10H, 11H

Data Port

12H

IFGS1

13H

IFGS2

14H

MII/EEPROM Access

15H

Test Register

16H

Inter-frame Gap (IFG)

17H

Reserved

18H - 1AH

Standard Printer Port (SPP)

1BH - 1EH

Reserved

1FH

Reset

Reserved

Tab - 10 Page 0 of MAC Core Registers Mapping

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