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Small Footprint MII/RMII 10/100 Ethernet Transceiver with HP Auto-MDIX and flexPWR® Technology

Datasheet

SMSC LAN8710A/LAN8710Ai

Revision 1.4 (08-23-12)

DATASHEET

Chapter 1 Introduction

1.1

General Terms and Conventions

The following is list of the general terms used throughout this document:

1.2

General Description

The LAN8710A/LAN8710Ai is a low-power 10BASE-T/100BASE-TX physical layer (PHY) transceiver

with variable I/O voltage that is compliant with the IEEE 802.3-2005 standards.

The LAN8710A/LAN8710Ai supports communication with an Ethernet MAC via a standard MII (IEEE

802.3u)/RMII interface. It contains a full-duplex 10-BASE-T/100BASE-TX transceiver and supports

10Mbps (10BASE-T) and 100Mbps (100BASE-TX) operation. The LAN8710A/LAN8710Ai implements

auto-negotiation to automatically determine the best possible speed and duplex mode of operation. HP

Auto-MDIX support allows the use of direct connect or cross-over LAN cables.

The LAN8710A/LAN8710Ai supports both IEEE 802.3-2005 compliant and vendor-specific register

functions. However, no register access is required for operation. The initial configuration may be

selected via the configuration pins as described in Section 3.7, "Configuration Straps," on page 36.

transceiver.

Per IEEE 802.3-2005 standards, all digital interface pins are tolerant to 3.6V. The device can be

configured to operate on a single 3.3V supply utilizing an integrated 3.3V to 1.2V linear regulator. The

linear regulator may be optionally disabled, allowing usage of a high efficiency external regulator for

lower system power dissipation.

The LAN8710A/LAN8710Ai is available in both extended commercial and industrial temperature range

versions. A typical system application is shown in Figure 1.1.

BYTE

8-bits

FIFO

First In First Out buffer; often used for elasticity buffer

MAC

Media Access Controller

MII

Media Independent Interface

RMIITM

Reduced Media Independent InterfaceTM

N/A

Not Applicable

Indicates that a logic state is “don’t care” or undefined.

RESERVED

Refers to a reserved bit field or address. Unless otherwise

noted, reserved bits must always be zero for write

operations. Unless otherwise noted, values are not

guaranteed when reading reserved bits. Unless otherwise

noted, do not read or write to reserved addresses.

SMI

Serial Management Interface

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