ADC31JB68 datasheet(10/74 Pages) TI1

10 / 74 page

ADC31JB68

SLASE60A – SEPTEMBER 2015 – REVISED SEPTEMBER 2015

www.ti.com

6.7 Electrical Characteristics - Interface

Typical values at TA = 25°C, full temperature range is TMIN = –40°C to TMAX = 85°C, ADC Sampling Rate = 500 MSPS, 50%

clock duty cycle, VA3.0 = 3 V; VA1.8 = 1.8 V; VA1.2 = VACLK1.2 = 1.2 V; –1 dBFS differential input; R(term) = 100 Ω (unless

otherwise noted). See the Interface Circuits section.

PARAMETER

NOTES

MIN

TYP

MAX

UNIT

ANALOG INPUTS (VIN+, VIN-)

V(FSR)

Full scale range voltage

Differential peak-to-peak

1.7

Nominal input common mode

VCM

1.6

voltage

Maximum input common mode

VCM ±

ΔVCM

voltage range

0.05

RIN

Input termination resistance

Differential resistance at DC

190

CIN

Input capacitance

Differential

4.6

INPUT COMMON MODE REFERENCE (VCM)

Common mode reference voltage

V(VCM)

1.6

output

I(VCM)

Maximum VCM pin current load

CLOCK INPUT (CLKIN+, CLKIN-)

VID-MAX

Maximum Input voltage swing(1)

Differential peak voltage

1000

VID-MIN

Minimum Input voltage swing(1)

Differential peak voltage

250

Input edge rate at zero

dVSS/dt

Recommended minimum

V/ns

crossing(1)

V(IS-

Input common mode internal bias

0.5

BIAS)

voltage(2)(1)

Externally applied common mode

V(IS-IN)

DC coupled interface

0.5 ± 0.1

voltage(1)

Z(rdiff)

Input termination resistance(2)

Differential resistance at DC

100

Common mode internal bias

Ztt

source impedance(2)

Input capacitance(2)

Differential

SYSREF INPUT (SYSREF+, SYSREF-)

VID-MAX

Maximum Input voltage swing(1)

Differential peak voltage

1000

VID-MIN

Minimum Input voltage swing(1)

Differential peak voltage

250

V(IS-

Input common mode internal bias

0.5

BIAS)

voltage(1)

DC coupled interface

The typical value depends on the

configuration of the SYS_CM parameter.

SYS_CM = 00

0.5 ± 0.1

Externally applied common mode

V(IS-IN)

SYS_CM = 01

0.8 ± 0.2

voltage(1)

1.25 ±

SYS_CM = 10

0.25

1.75 ±

SYS_CM = 11

0.25

Z(rdiff)

Input termination resistance(2)

Differential resistance at DC

100

Common mode internal bias

Ztt

source impedance(2)

Input capacitance(2)

Differential

SYNCb INPUT (SYNCb+, SYNCb-)

VID

Input voltage swing(1)

Differential peak voltage

350

Externally applied common mode

1.25 ±

V(IS-IN)

DC coupled interface

voltage(1)

0.75

(1)

Specification applies to the electrical level diagram of Figure 26

(2)

Specification applies to the electrical circuit diagram of Figure 27

Submit Documentation Feedback

Product Folder Links: ADC31JB68

ADC31JB68 Datenblatt(PDF) 10 Page - Texas Instruments

ADC31JB68 Datenblatt(HTML) 10 Page - Texas Instruments

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74

Datenblatt Download

Link URL