VNI8200XP-32 datasheet(21/43 Pages) STMICROELECTRONICS

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VNI8200XP-32

Pin function description

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signal is high, slave not selected, the microcontroller should drive the CLK low (the settings

for the MCU SPI port are CPHA = 0 and CPOL = 0).

9.5

Slave select

If SEL2 = H, the slave select ( SS ) signal is used to enable the VNI8200XP-32 serial

communication shift register; data is flushed-in through the SDI pin and flushed-out from

the SDO pin only when the SS

pin is low. On the SS

pin falling edge the shift register

(containing the fault conditions) is frozen, so any change on the power switches status is

latched until the next SS

falling edge event and the SDO output is enabled. On the SS

pin rising edge event the 8/16 bits present on the SPI shift register are evaluated and the

outputs are driven according to this frame. If more than 8/16 bits (depending on the SPI

settings) are flushed inside only the last 8/16 are evaluated; the others are flushed out from

the SDO pin after fault condition bits; in this way a proper communication is possible also in

a daisy chain configuration.

Figure 5: SPI mode diagram

9.6

8/16-bit selection (SEL1)

If SEL2 = H, SEL1 is used to select between two possible SPI configurations: the 8-bit SPI

mode (SEL1 = L) and the 16-bit SPI mode (SEL1 = H). 8/16-bit SPI operation is described

below.

9.7

Output enable (OUT_EN)

If SEL2 = H, the OUT_EN pin provides a fast way to disable all the outputs simultaneously.

When the OUT_EN pin is driven low for at least TRES, the outputs are disabled while fault

conditions in the SPI register are latched. To enable the outputs, the OUT_EN pin should

be raised and the IC should be re-programmed through the SPI interface. As fault

conditions are latched inside the IC and SPI interface also works while the OUT_EN pin is

driven low, the SPI can be used to detect if a fault condition occurred before than the reset

event.

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