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VS6663CC Datenblatt(PDF) 15 Page - STMicroelectronics |
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VS6663CC Datenblatt(HTML) 15 Page - STMicroelectronics |
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15 / 63 page ![]() Doc ID028526 Rev 1 15/63 VS6663CC Functional description 46 Figure 7. VS6663CC power-up sequence for CCP2 t0 t1 t3 t4 t5 t6 VDIG VANA XSHUTDOWN EXTCLK (Free running) EXTCLK (Gated) CCI CLK+/- DATA+/- Frame count register EXTCLCK may be free running or gated Read Device ID Configure Device Enter Streaming 0xFF 0x01 t2 t7 This is an example of VANA rising after VDIG High Z (tri-state) LP00 (CSI-2 mode) Mode changed to CCP2 |
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