Unit LoadingFan Out

54F74F

Pin Names

Description

UL

HIGHLOW

Data Inputs

1010

LE

Latch Enable Input (Active HIGH)

1010

OE

Output Enable Input (Active LOW)

1010

TRI-STATE Latch Outputs

15040 (333)

b

3 mA24 mA (20 mA)

Functional Description

The ’F373 contains eight D-type latches with TRI-STATE

output buffers When the Latch Enable (LE) input is HIGH

the latches are transparent ie a latch output will change

state each time its D input changes When LE is LOW the

latches store the information that was present on the D in-

puts a setup time preceding the HIGH-to-LOW transition of

LE The TRI-STATE buffers are controlled by the Output

Enable (OE) input When OE is LOW the buffers are in the

bi-state mode When OE is HIGH the buffers are in the high

impedance mode but this does not interfere with entering

new data into the latches

Truth Table

Inputs

Output

LE

OE

HLH

H

HL

L

L

LL

X

XHX

Z

Logic Diagram

TLF9523 – 5

Please note that this diagram is provided only for the understanding of logic operations and should not be used to estimate propagation delays

2