54F398DM datasheet(3/10 Pages) NSC

3 / 10 page

Functional Description

The ’F398 and ’F399 are high-speed quad 2-port registers

They select four bits of data from either of two sources

(Ports) under control of a common Select input (S) The

selected data is transferred to a 4-bit output register syn-

chronous with the LOW-to-HIGH transition of the Clock in-

put (CP) The 4-bit D-type output register is fully edge-trig-

gered The Data inputs (I0x I1x) and Select input (S) must be

stable only a setup time prior to and hold time after the

LOW-to-HIGH transition of the Clock input for predictable

operation The ’F398 has both Q and Q outputs

Function Table

Inputs

Outputs

SI0

H e HIGH Voltage Level

L e LOW Voltage Level

h e HIGH Voltage Level one setup time prior to the LOW-to-HIGH clock

transition

I e LOW Voltage Level one setup time prior to the LOW-to-HIGH clock

transition

X e Immaterial

’F398 only

Logic Diagram

TLF9533 – 9

’F398 Only

Please note that this diagram is provided only for the understanding of logic operations and should not be used to estimate propagation delays

54F398DM Datenblatt(PDF) 3 Page - National Semiconductor (TI)