SC21152 datasheet(13/18 Pages) SEMTECH

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SC21152

Applications Information (continued)

On-time: The high-side mosfet turns on, as trig-

gered by the FB signal falling to the internal ref-

erence. The high-side stays on for a

predetermined time based on VIN and VOUT,

then turns off.

Off-time: the low-side mosfet turns on. Inductor

current is monitored via the low-side switch.

When the current falls to zero, the low-side

mosfet turns off.

Dead-time: both mosfets are off. If the FB signal

is higher than the internal reference, both

mosfets remain off. During the dead-time the

load current is supplied by the output capacitor,

causing the output and the FB signal to fall.

When the FB signal falls to the 800mV threshold,

the next high-side pulse begins.

As load current increases, the dead-time between pulses

reduces. On any cycle, if the minimum off-time (60nsec)

has elapsed and the FB signal is calling for another high-

side on-time, the controller exits PFM and enters PWM

operation.

Once the controller is in PWM operation, the inductor

current must go below zero (go negative) for 16 switch-

ing cycles before the controller will return to PFM

operation.

Soft start

The SC21152 contains an internal soft start to reduce

inrush current during start-up. During start-up, the FB

signal is compared to an internal ramp, providing a

gradual ramp on VOUT. The timing to move VOUT from

0V to 95% of final value is typically 100usec. Optional soft

start times of 200usec, 400usec, and 800usec can be

provided.

Pre-bias Start-up

During start-up, the low-side mosfet turns off if the induc-

tor current falls negative (into the LX pin) on any cycle.

This prevents discharge of the output capacitor during

the soft-start cycle. Note that if the output is loaded

during a Pre-Bias start-up, the output voltage may fall

until the internal Soft-start ramp rises above the voltage

seen at the FB pin.

•

Power Good Indicator

The SC21152 includes a open-drain Power Good (PG)

indicator. The PG output is in a logic high (open) state

when the FB pin is above 95% of the final value (above

760mV). The PG threshold has 3% hysteresis to prevent

chattering.

During a start-up cycle, the PG output is pulled low typi-

cally 30usec before the start of mosfet switching. The PG

output stays low until the FB pin exceeds 95% of the final,

which begins the PG Assert Time delay of 75μsec. After

the Assert Time has passed, the PG output will drive high

(open circuit). If the FB signal falls to the falling edge PG

threshold, a Deassert Time delay of 13μsec must elapse

before the PG output will change to logic low.

The PG pin requires a pull-up resistor to provide a logic

high to a microcontroller. If the PG signal is not used at

the system level, the pull-up resistor can be omitted.

Note that the PG output is high (open) when the EN pin is

low. This prevents power loss in the PG pull-up resistor

when the device is disabled.

VIN Under-Voltage Lockout

The SC21152 includes an under-voltage lockout (UVLO)

to inhibit switching until the input voltage exceeds 2.16V.

The VIN UVLO threshold has 85mV hysteresis to prevent

chatter during start-up.

EN Input

The EN input is a logic level input. When EN is set to logic

high, the SC21152 goes through an internal reset to

prepare for operation. The soft-start ramp and mosfet

switching begin typically 50μsec after EN is driven high.

When EN is low (grounded), the SC21152 is off and in its

lowest power state. The power mosfets are off and the PG

output is high (open). The automatic discharge mosfet

on LX is on to discharge the output before the next start-

up cycle.

Automatic Discharge

When the EN pin is pulled low (grounded), the power

mosfets are tri-stated and the LX pin is connected to GND

through an internal mosfet to discharge the output

capacitors. Typical mosfet RDS

ON is 40 ohms at 5V and

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