SWCS049J datasheet(25/119 Pages) TI1

25 / 119 page

TPS659110, TPS659112, TPS659113

TPS659114, TPS659118, TPS6591133

www.ti.com

SWCS049Q – JUNE 2010 – REVISED MARCH 2016

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Product Folder Links: TPS659110 TPS659112 TPS659113 TPS659114 TPS659118 TPS6591133

Specifications

VDD2 SMPS (continued)

over operating free-air temperature range (unless otherwise noted)

PARAMETER

TEST CONDITIONS

MIN

TYP

MAX

UNIT

DC line regulation

On mode, VIN = VINmin to VINmax at IOUT = 1500 mA

VDD2 output voltage = (0.6 to 1.5V)

On mode, VIN = VINmin to VINmax at IOUT = 1200 mA

VDD2 output voltage = (2.2 to 3.3 V)

Transient load regulation

VIN = 3.8 V, VOUT = 1.2 V

IOUT = 0 to 500 mA , Maximum slew = 100 mA/µs

IOUT = 700 mA to 1.2 A , Maximum slew = 100 mA/µs

Turnon time (ton) Off to on

IOUT = 200 mA

350

µs

Output voltage transition

rate

From VOUT = 0.6 V to 1.5 V

and VOUT = 1.5 V to 0.6 V

IOUT = 500 mA

TSTEP[2:0] = 001

12.5

mV/µs

TSTEP[2:0] = 011 (default)

7.5

TSTEP[2:0] = 111

2.5

Overshoot

SMPS turned on

Power-save mode ripple

voltage

PFM (pulse skip mode), IOUT = 1 mA

0.025 × VOUT

VPP

Switching frequency

2.7

3.3

MHz

Duty cycle

100%

Minimum On time

P-Channel MOSFET

Discharge resistor for

power-down sequence RDIS

VFB2 internal resistance

0.5

Ground current (IQ)

Off

µA

PWM mode, IOUT = 0 mA, VIN = 3.8 V, VDD2_PSKIP = 0

7500

PFM (pulse skipping) mode, no switching

Low-power (pulse skipping) mode, no switching

ST[1:0] = 11

Conversion efficiency

PWM mode, DCRL < 50 mΩ,

VOUT = 1.2 V, VIN = 3.6 V:

IOUT = 10 mA

35%

IOUT = 100 mA

78%

IOUT = 400 mA

80%

IOUT = 800 mA

74%

IOUT = 1200 mA

66%

IOUT = 1500 mA

62%

PFM mode, DCRL < 50 mΩ,

VOUT = 1.2 V, VIN = 3.6 V:

IOUT = 1 mA

59%

IOUT = 10 mA

70%

IOUT = 400 mA

80%

PWM mode, DCRL < 50 mΩ,

VOUT = 3.3 V, VIN = 5 V:

IOUT = 10 mA

39%

IOUT = 100 mA

85%

IOUT = 400 mA

91%

IOUT = 800 mA

90%

IOUT = 1200 mA

86%

PFM mode, DCRL < 50 mΩ,

VOUT = 3.3 V, VIN = 5 V:

IOUT = 1 mA

80%

IOUT = 10 mA

82%

IOUT = 400 mA

92%

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