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SWCS049A Datenblatt(PDF) 73 Page - Texas Instruments

Teilenummer SWCS049A
Bauteilbeschribung  Integrated Power Management Unit Top Specification
PDF  119 Pages
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Hersteller  TI1 [Texas Instruments]
Direct Link  http://www.ti.com
Logo TI1 - Texas Instruments

SWCS049A Datenblatt(HTML) 73 Page - Texas Instruments

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TPS659110, TPS659112, TPS659113
TPS659114, TPS659118, TPS6591133
www.ti.com
SWCS049Q – JUNE 2010 – REVISED MARCH 2016
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Product Folder Links: TPS659110 TPS659112 TPS659113 TPS659114 TPS659118 TPS6591133
Detailed Description
Copyright © 2010–2016, Texas Instruments Incorporated
Bits
Field Name
Description
Type
Reset
3
SLEEPP
SLEEP pad pulldown control:
1: Pulldown is enabled
0: Pulldown is disabled
RW
1
2
PWRHOLDP
PWRHOLD pad pulldown control:
1: Pulldown is enabled
0: Pulldown is disabled
RW
1
1
HDRSTP
HDRST pad pulldown control:
1: Pulldown is enabled
0: Pulldown is disabled
RW
1
0
NRESPWRON2P
NRESPWRON2 pad control:
1: Pulldown is enabled
0: Pulldown is disabled
RW
1
Table 6-33. REF_REG
Address Offset
0x1D
Physical Address
Instance
(RESET DOMAIN: TURNOFF OFF
RESET)
Description
Reference control register
Type
RO
7
6
5
4
3
2
1
0
Reserved
ST
Bits
Field Name
Description
Type
Reset
7:2
Reserved
Reserved bit
RO
R returns
0s
0x00
1:0
ST
Reference state:
ST[1:0] = 00: Off
ST[1:0] = 01: On high power (ACTIVE)
ST[1:0] = 10: Reserved
ST[1:0] = 11: On low power (SLEEP)
(Write access available in test mode only)
RO
0x1
Table 6-34. VRTC_REG
Address Offset
0x1E
Physical Address
Instance
(RESET DOMAIN: GENERAL
RESET)
Description
VRTC internal regulator control register
Type
RW
7
6
5
4
3
2
1
0
Reserved
VRTC_
OFFMASK
Reserved
ST
Bits
Field Name
Description
Type
Reset
7:4
Reserved
Reserved bit
RO
R returns
0s
0x0
3
VRTC_OFFMASK
VRTC internal regulator off mask signal:
when 1, the regulator keeps its full-load capability during device OFF
state.
when 0, the regulator will enter in low-power mode during device OFF
state.
Note that VRTC is put in low-power mode when the device is on backup
even if this bit is set to 1
(Default value: See boot configuration)
RW
0



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