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SP705 Datenblatt(PDF) 6 Page - Sipex Corporation |
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SP705 Datenblatt(HTML) 6 Page - Sipex Corporation |
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6 / 18 page ![]() SP705DS/09 SP705 Low Power Microprocessor Supervisory Circuits © Copyright 2000 Sipex Corporation 6 Figure 4A. Power-Fail Comparator De-assertion Response Time. 30pF 1K Ω PFO +1.25V +5V PFI VCC = +5V TA = +25 C Figure 4B. Circuit for the Power-Fail Comparator De- assertion Response Time. Figure 5A. Power-Fail Comparator Assertion Response Time. Figure 5B. Circuit for the Power-Fail Comparator Assertion Response Time. Figure 6A. SP705/707 RESET Output Voltage vs. Supply Voltage. Figure 6B. Circuit for the SP705/707 RESET Output Voltage vs. Supply Voltage. 30pF 1K Ω PFO +1.25V +5V PFI VCC = +5V TA = +25 C 330pF 2K Ω VCC TA = +25 oC VCC RESET RESET GND |
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