M21245 datasheet(21/50 Pages) MA-COM

21 / 50 page

Functional Description

21245-DSH-001-H

Mindspeed Technologies

Mindspeed Proprietary and Confidential

4.2

High-Speed Differential Inputs

The M21245 features four differential inputs; compatible with PCML. LVDS and LVPECL signal levels are also

accommodated. Serial data to be retimed is presented to these four inputs. Each input is terminated with a 50

termination to AVDDI. AVDDI can be supplied from any voltage ranging from 1.2 V to 3.3 V.

In order to improve signal integrity when used in large systems, each input also comes equipped with

programmable input equalization (IE) for FR4 trace. There are four settings for input equalization: 0 dB (or no

equalization), 2 dB, 4 dB, and 6 dB. In serial control mode, the input equalization level for each input may be set by

programming the desired value to register.Input EQ Config (addresses 00h–03h). Alternatively, in hardware mode,

the input equalization for all of the inputs may be set globally through pin.IE_CTRL (MF2). In hardware mode only

the three settings of 0 dB, 4 dB, and 6 dB are available.

In most SDI applications, it is important to avoid AC-coupled data interfaces between devices wherever possible. In

addition to reducing the number of components, DC-coupling will result in more system jitter margin. In order to

accommodate DC-coupling with the upstream device, the AVDDI power domain of the M21245 is electrically

independent from all other power domains therefore allowing it to be tied to the VDD of the upstream device. This is

demonstrated in Figure 4-2 below.

Alternatively and under certain conditions, the M21245 allows for the inputs to be self biased eliminating the need

for an electrical connection between the supply voltages of the upstream device and M21245. This configuration

offers the benefit of keeping the supply of the previous device and the power domain(s) of the M21245 completely

isolated, while using DC-coupling. AC-coupling should not be used with the self bias interface. This self-biasing

scheme is demonstrated in Figure 4-3 below.

When using the M21245 in self biased mode, specific conditions must be met:

The self biased inputs must be DC-coupled. No AC-coupling is supported in self biased mode.

The AVDDO of the upstream device must be 2.5 V or greater. AVDDO levels 1.2 V and 1.8 V are not supported

in this mode.

The common mode of the upstream signals must be greater than 600 mV.

Internal voltage regulators are disabled.

All inputs are configured in self biased mode. Combination of self biased and non-self biased is not supported.

Figure 4-2.

M21245 AVDDI Connected to the VDD of the Upstream Device

Upstream Device

VDD

M21245

1.2 V – 3.3 V

AVDDI

M21245 Datenblatt(PDF) 21 Page - M/A-COM Technology Solutions, Inc.