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CLC411AMC Datenblatt(PDF) 2 Page - National Semiconductor (TI)

[Old version datasheet] Texas Instruments acquired National semiconductor.
Teilenummer CLC411AMC
Bauteilbeschribung  High-Speed Video Op Amp with Disable
PDF  8 Pages
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Hersteller  NSC [National Semiconductor (TI)]
Direct Link  http://www.national.com
Logo NSC - National Semiconductor (TI)

CLC411AMC Datenblatt(HTML) 2 Page - National Semiconductor (TI)

  CLC411AMC Datasheet HTML 1Page - National Semiconductor (TI) CLC411AMC Datasheet HTML 2Page - National Semiconductor (TI) CLC411AMC Datasheet HTML 3Page - National Semiconductor (TI) CLC411AMC Datasheet HTML 4Page - National Semiconductor (TI) CLC411AMC Datasheet HTML 5Page - National Semiconductor (TI) CLC411AMC Datasheet HTML 6Page - National Semiconductor (TI) CLC411AMC Datasheet HTML 7Page - National Semiconductor (TI) CLC411AMC Datasheet HTML 8Page - National Semiconductor (TI)  
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PARAMETERS
CONDITIONS
TYP
MIN/MAX RATINGS
UNITS
SYMBOL
Ambient Temperature
CLC411 AJ
+25°C
-40°C
+25°C
+85°C
FREQUENCY DOMAIN RESPONSE
-3dB bandwidth
Vout < 1Vpp
200
150
150
110
MHz
SSBW
Vout < 6Vpp
75
50
50
40
MHz
LSBW
gain flatness
V
out < 1Vpp
peaking
DC to 30MHz
0.05
0.2
0.2
0.3
dB
GFPL
rolloff
DC to 30MHz
0.05
0.2
0.2
0.4
dB
GFRL
peaking
DC to 200MHz
0.1
0.6
0.5
0.6
dB
GFPH
rolloff
DC to 60MHz
0.2
0.7
0.4
0.7
dB
GFRH
linear phase deviation
DC to 60MHz
0.3
1.0
1.0
1.0
°
LPD
differential gain
4.43MHz, R
L=150W
0.02
%
DG
differential phase
4.43MHz, RL=150W
0.03
°
DP
TIME DOMAIN RESPONSE
rise and fall time
6V step
2.3
ns
TR
settling time to 0.1%
2V step
15
23
18
23
ns
TS
overshoot
2V step
5
15
10
15
%
OS
slew rate
6V step
2300
V/
µsSR
DISTORTION AND NOISE RESPONSE (note 1)
2ND harmonic distortion
2Vpp, 20MHz
-48
-35
-35
-35
dBc
HD2
3RD harmonic distortion
2V
pp, 20MHz
-52
-42
-42
-35
dBc
HD3
equivalent noise input
voltage
>1MHz
2.5
nV/
√Hz VN
inverting current
>1MHz
12.9
pA/
√Hz ICI
non-inverting current
>1MHz
6.3
pA/
√Hz ICN
noise floor
>1MHz
-157
dBm1Hz
SNF
integrated noise
1MHz to 200MHz
45
µVINV
STATIC DC PERFORMANCE
*input offset voltage
±2
±13
±9.0
±14
mV
VIO
average temperature coefficient
+30
±50
____
±50
µV/°C
DVIO
*input bias current
non-inverting
12
65
30
±20
µAIBN
average temperature coefficient
±200
±400
____
±250
nA/°C
DIBN
*input bias current
inverting
±12
±40
±30
±30
µA
IBI
average temperature coefficient
±50
±200
____
±150
nA/°C
DIBI
power supply rejection ratio
56
48
50
48
dB
PSRR
common mode rejection ratio
52
44
46
44
dB
CMRR
*supply current
no load
11
14
12
12
mA
ICC
supply current
disabled
2.5
4.5
3.5
4.5
mA
ICCD
DISABLE/ENABLE PERFORMANCE (note 2)
disable time
to >50dB attenuation @10MHz
10
30
30
60
ns
TOFF
enable time
55
ns
TON
DIS voltage
pin 8
to disable
4.5
<3.0
<3.0
<3.0
V
VDIS
to enable
5.5
>7.0
>6.5
>6.5
V
VEN
off isolation
at 10MHz
59
55
55
55
dB
OSD
MISCELLANEOUS PERFORMANCE
non-inverting input resistance
1000
250
750
1000
k
RIN
non-inverting input capacitance
2.0
3.0
3.0
3.0
pF
CIN
output voltage range
no load
±6.0
±4.5
V
VO
output voltage range
R
L=100
±4.5
±4.0
V
VOL
common mode input range
±4.0
±3.5
V
CMIR
output current
70
30
50
40
mA
IO
Min/max ratings are based on product characterization and simulation. Individual parameters are tested as noted. Outgoing quality levels
are determined from tested parameters.
CLC411 Electrical Characteristics (A
(A
(A
(A
(AVVVVV = +2; V
= +2; V
= +2; V
= +2; V
= +2; VCC
CC
CC
CC
CC =
=
=
=
=
±±±±±15V; R
15V; R
15V; R
15V; R
15V; RLLLLL = 100
= 100
= 100
= 100
= 100
Ω; R
; R
; R
; R
; Rfffff = 301
= 301
= 301
= 301
= 301
Ω, unless noted)
, unless noted)
, unless noted)
, unless noted)
, unless noted)
Absolute Maximum Ratings
Miscellaneous Ratings
Vcc
±18V
Iout
125mA
common-mode input voltage
±Vcc
differential input voltage
±15V
maximum junction temperature
+150°C
operating temperature range: AJ
-40°C to +85°C
storage temperature range
-65°C to +150°C
lead temperature (soldering 10 sec)
+300°C
ESD (human body model)
1000V
Recommended gain range
±1 to ±10V/V
Notes: * AJ : 100% tested at +25°C.
note 1
: Specifications guaranteed using 0.01mF bypass capacitors
on pins 1 & 5.
note 2
: Break before make is guaranteed.
http://www.national.com
2
Package Thermal Resistance
Package
θθθθθ
JC
θθθθθ
JA
AJP
65°C/W
120°C/W
AJE
55°C/W
135°C/W
A8B
25°C/W
115°C/W
Reliability Information
Transistor count
70



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