Timing Characteristics

This section contains timing diagrams for the microprocessor bus interface MICROWIRE port interface and the Control and

Clock timings relationships

Timing characteristics are derived from worst-case simulations plus guardbanding Production testing is limited to device func-

tionality

NSCIntel Bus Format

MULTIPLEXED MICROPROCESSOR BUS

TLH10803 – 7

NON-MULTIPLEXED MICROPROCESSOR BUS

TLH10803 – 8

Symbol

Parameter

Conditions

Min

Max

Units

Width Address Strobe High

20

ns

Setup Address to Address Strobe

10

ns

Hold Address Strobe Low to Address

10

ns

Hold Address Strobe to Read Strobe

10

ns

Delay Read Low to Data

100 pF Load

70

ns

Hold Read High to Data

5

40

ns

Width Read Strobe Low

20

ns

Setup Data to Write High

30

ns

Hold Write High to Data

10

ns

Width Write Strobe Low

20

ns

Setup Address to Read Low

ns

Hold Read High to Address

ns

Setup Address to Write Low

ns

Hold Write High to Address

ns

13