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AD7993 Datenblatt(PDF) 18 Page - Analog Devices |
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AD7993 Datenblatt(HTML) 18 Page - Analog Devices |
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18 / 27 page ![]() AD7994/AD7993 –18– REV. PrF PRELIMINARYTECHNICAL DATA LIMIT REGISTERS The AD7994/AD7993 has four pairs of limit registers, each to store high and low conversion limits for each ana- log input channel. Each pair of limit registers has one associated hysteresis register. All twelve registers are 16- bits wide, only the 12 LSBs of the Registers are used for the AD7994/AD7993, However on the AD7993 the 2 LSBs, D1 and D0, should contain 0s. On power-up, the contents of the DATAHIGH Register for each channel will be fullscale, while the contents of the DATALOW registers will be zeroscale by default. The Limit Registers can be used to monitor the conversion results on each on the Analog input channels. The AD7994/AD7993 will signal an Alert ( in either hardware or software or both depend- ing on configuration) if the result moves outside the upper or lower limit set by the limit registers. DATAHIGH REGISTER CH1/CH2/CH3/CH4 The DATAHIGH Register for each channel is a 16-bit read/ write register, only the 12 LSBs of the Register are used. The Registers store the upper limit that will activate the ALERT output and/or the Alert_Flag bit in the Conver- sion Result Register. Therefore, if the value in the Con- version Result Register is greater than the value in the DATAHIGH Register, then the Alert_Flag bit is set to 1 and the ALERT pin is activated (the latter is true if ALERT is enabled in the Configuration Register). When the conversion result returns to a value at least N LSBs below the DATAHIGH Register value the ALERT output pin and Alert_Flag bit will be reset. The value of N is taken from the 12-bit Hysteresis register associated with that channel. The ALERT pin can also be reset by writ- ing to bits D2, D1 in the Configuration Register. For the AD7993, D1 and D0 of the DATAHIGH register should contain 0’s. Table VIIIa. DATAHIGH Register (First Read/Write) D15 D14 D13 D12 D11 D10 D9 D8 Alert_Flag 0 0 0 B11 B10 B 9 B 8 Table VIIIb. DATAHIGH Register (Second Read/Write) D7 D6 D5 D4 D3 D2 D1 D0 B7 B6 B5 B4 B3 B2 B1 B0 DATALOW REGISTER CH1/CH2/CH3/CH4 The DATALOW Register for each channel is a 16-bit read/ write register, of which only the 12 LSBs are used. The Register stores the lower limit that will activate the ALERT output and/or the Alert_Flag bit in the conver- sion result register. Therefore, if the value in the Conver- sion Result Register is less than the value in the DATALOW Register, then the Alert_Flag bit is set to 1 and the ALERT pin is activated (the latter is true if ALERT is enabled in the Configuration Register). When the Conver- sion result returns to a value at least N LSBs above the DATALOW Register value the ALERT ouput pin and Alert_Flag bit will be reset. The value of N is taken from the 12-bit Hysteresis register associated with that channel. The ALERT pin can also be reset by writing to bit D2,D1 in the Configuration Register. For the AD7993 D1 and D0 of the DATALOW register should contain 0’s. Table IXa. DATALOW Register (First Read/Write) D15 D14 D13 D12 D11 D10 D9 D8 Alert_Flag 0 0 0 B11 B10 B 9 B 8 Table IXb. DATALOW Register (Second Read/Write) D7 D6 D5 D4 D3 D2 D1 D0 B7 B6 B5 B4 B3 B2 B1 B0 HYSTERESIS REGISTER (CH1/CH2/CH3/CH4) Each Hysteresis Register is a 16-bit read/write register, only the 12 LSBs of the register are used. The Registers store the hysteresis value, N when using the limit registers. Each pair of Limit registers has a dedicated hysteresis register. The hysteresis value determines the reset point for the ALERT pin/Alert_Flag if a violation of the limits has occurred. If a hysteresis value of say 8 LSBs is re- quired on the upper and lower limits of channel 1 then the 12 bit word, 0000 0000 0000 1000, should be written to the Hysteresis Register CH1, the address of which is shown in Table III. On power up, the Hysteresis Registers will contain a value of 8 LSBs for the AD7994 and 2 LSBs for the AD7993. If a different hysteresis value is required then that value must be written to the Hysteresis Register for the channel in question. For the AD7993 D1 and D0 of the Hysteresis Register should contain 0’s. Table Xa. Hysteresis Register (First Read/Write) D15 D14 D13 D12 D11 D10 D9 D8 Alert_Flag 0 0 0 B11 B10 B 9 B 8 Table Xb. Hysteresis Register (Second Read/Write) D7 D6 D5 D4 D3 D2 D1 D0 B7 B6 B5 B4 B3 B2 B1 B0 Using the Limit Registers to Store Min/Max Conversion Results If fullscale, i.e. all 1s, is written to the Hysteresis register for a particular channel then the DATAHIGH and DATALOW Registers for that channel will no longer act as Limit registers as previously described, but instead they will act as storage registers for the maximum and mini- mum conversion results returned from conversions on a channel over any given period of time. This function is useful in applications where the widest span of actual con- version results is required rather than using the ALERT to signal an intervention is necessary, e.g. monitoring tem- perature extremes during refrigerated goods transporta- tion. When using the limit registers to store the min and |
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