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LP2998MA/NOPB Datenblatt(PDF) 20 Page - Texas Instruments |
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LP2998MA/NOPB Datenblatt(HTML) 20 Page - Texas Instruments |
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20 / 33 page ![]() LP2998, LP2998-Q1 SNVS521K – DECEMBER 2007 – REVISED AUGUST 2014 www.ti.com 10 Power Supply Recommendations There are several recommendations for the LP2998 input power supply. An input capacitor is not required but is recommended for improved performance during large load transients to prevent the input rail from dropping. The input capacitor should be located as close as possible to the PVIN pin. Several recommendations exist dependent on the application required. A typical value recommended for AL electrolytic capacitors is 50 µF. Ceramic capacitors can also be used, a value in the range of 10 µF with X5R or better would be an ideal choice. The input capacitance can be reduced if the LP2998 is placed close to the bulk capacitance from the output of the 2.5 V DC-DC converter. If the two supply rails (AVIN and PVIN) are separated then the 47 uF capacitor should be placed as close to possible to the PVIN rail. An additional 0.1 uF ceramic capacitor can be placed on the AVIN rail to prevent excessive noise from coupling into the device. 11 Layout 11.1 Layout Guidelines 1. The input capacitor for the power rail should be placed as close as possible to the PVIN pin. 2. VSENSE should be connected to the VTT termination bus at the point where regulation is required. For motherboard applications an ideal location would be at the center of the termination bus. 3. VDDQ can be connected remotely to the VDDQ rail input at either the DIMM or the Chipset. This provides the most accurate point for creating the reference voltage. 4. For improved thermal performance excessive top side copper should be used to dissipate heat from the package. Numerous vias from the ground connection to the internal ground plane will help. Additionally these can be located underneath the package if manufacturing standards permit. 5. Care should be taken when routing the VSENSE trace to avoid noise pickup from switching I/O signals. A 0.1 µF ceramic capacitor located close to the SENSE can also be used to filter any unwanted high frequency signal. This can be an issue especially if long SENSE traces are used. 6. VREF should be bypassed with a 0.01 µF or 0.1 µF ceramic capacitor for improved performance. This capacitor should be located as close as possible to the VREF pin. 20 Submit Documentation Feedback Copyright © 2007–2014, Texas Instruments Incorporated Product Folder Links: LP2998 LP2998-Q1 |
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