LP3984

SNVS160F – OCTOBER 2001 – REVISED OCTOBER 2013

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Block Diagram

Pin Descriptions

Name

SOT

Function

A2

3

Enable Input Logic, Enable High

GND

A1

2

Common Ground

B1

5

Output Voltage of the LDO

B2

1

Input Voltage of the LDO

N.C.

4

No Connection

(1)

The pin numbering scheme for the DSBGA package was revised in April 2002 to conform to JEDEC standards. Only the pin numbers

were revised. No changes to the physical locations of the inputs/outputs were made. For reference purposes, the obsolete numbering

Connection Diagram

SOT-23-5 Package

Figure 1. Top View

See Package Number DBV

DSBGA, 4-Bump Package

Figure 2. Top View

See Package Number YPB0004

2

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