LP5521 datasheet(7/48 Pages) TI1

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LP5521

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SNVS441H – JANUARY 2007 – REVISED MAY 2016

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(1)

Input, output, and fly capacitors should be of the type X5R or X7R low ESR ceramic capacitor.

6.6 Charge Pump Electrical Characteristics

Limits are for TJ = 25°C unless specified in the test conditions.

(1)

SYMBOL

PARAMETER

TEST CONDITION

MIN

TYP

MAX

UNIT

ROUT

Charge pump output

resistance

Gain = 1.5×

3.5

Ω

Gain = 1×

Ω

fSW

Switching frequency

1.25

MHz

–30°C < TA < 85°C

–7%

IGND

Ground current

Gain = 1.5×

1.2

Gain = 1×

0.5

tON

VOUT turn-on time from charge

pump off to 1.5x mode

VDD = 3.6 V, CHIP_EN = H

IOUT = 60 mA

100

μs

VOUT

Charge pump output voltage

VDD = 3.6 V, no load, Gain = 1.5×

4.55

(1)

Matching is the maximum difference from the average of the three output's currents.

(2)

Saturation voltage is defined as the voltage when the LED current has dropped 10% from the value measured at VOUT – 1 V.

6.7 LED Driver Electrical Characteristics (R, G, B Outputs)

Limits are for TJ = 25°C unless specified in the test conditions.

SYMBOL

PARAMETER

TEST CONDITION

MIN

TYP

MAX

UNIT

ILEAKAGE

R, G, B pin leakage current

0.1

µA

–30°C < TA < 85°C

IMAX

Maximum source current

Outputs R, G, B

25.5

IOUT

Accuracy of output current

Output current set to 17.5 mA, VDD = 3.6 V

–4%

Output current set to 17.5 mA, VDD = 3.6 V,

–30°C < TA < 85°C

–5%

IMATCH

Matching(1)

IOUT = 17.5 mA, VDD = 3.6 V

fLED

LED PWM switching

frequency

PWM_HF = 1

Frequency defined by internal oscillator

558

PWM_HF = 0

Frequency defined by 32-kHz clock

(internal or external)

256

VSAT

Saturation voltage(2)

IOUT set to 17.5 mA

100

(1)

The I2C-compatible host should allow at least 1 ms before sending data to the LP5521 after the rising edge of the enable line.

6.8 Logic Interface Characteristics

(V(EN) = 1.65 V...VDD, and limits apply through ambient temperature range –30°C < TA < +85°C, unless otherwise noted.

PARAMETER

TEST CONDITIONS

MIN

TYP

MAX

UNIT

LOGIC INPUT EN

VIL

Input low level

0.5

VIH

Input high level

1.2

Logic input current

–1

µA

tDELAY

Input delay (1)

TJ = 25°C

µs

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