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EMC1428 Datenblatt(PDF) 43 Page - Microchip Technology |
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EMC1428 Datenblatt(HTML) 43 Page - Microchip Technology |
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43 / 53 page ![]() 1°C Multiple Temperature Sensor with HW Thermal Shutdown & Hottest of Thermal Zones Data Sheet 2014 Microchip Technology Inc. DS20005275A-page 43 5.19 Low Limit Status Register The Low Limit Status Register contains the status bits that are set when a temperature channel drops below the low limit for a number of consecutive readings as set by the consecutive alert counts (see Section 5.14). If any of these bits are set, then the LOW status bit in the Status Register is set. Reading from the Low Limit Status Register will clear all bits if the error condition has been removed. Reading from the register will also clear the LOW status bit in the Status Register. The ALERT pin will be set if any of these status bits are set. Bit 7 - E7LOW - This bit is set when the External Diode 7 channel drops below its programmed low limit. Bit 6 - E6LOW - This bit is set when the External Diode 6 channel drops below its programmed low limit. Bit 5- E5LOW - This bit is set when the External Diode 5 channel drops below its programmed low limit. Bit 4 - E4LOW - This bit is set when the External Diode 4 channel drops below its programmed low limit. Bit 3 - E3LOW - This bit is set when the External Diode 3 channel drops below its programmed low limit. Bit 2 - E2LOW - This bit is set when the External Diode 2 channel drops below its programmed low limit. Bit 1 - E1LOW - This bit is set when the External Diode 1 channel drops below its programmed low limit. Bit 0 - ILOW - This bit is set when the Internal Diode channel drops below its programmed low limit. 5.20 THERM Limit Status Register The THERM Limit Status Register contains the status bits that are set when a temperature channel THERM Limit is exceeded for a number of consecutive readings as set by the consecutive therm counts (see Section 5.14). If any of these bits are set, then the THERM status bit in the Status Register is set. Reading from the THERM Limit Status Register will not clear the status bits. Once the temperature drops below the THERM Limit minus the THERM Hysteresis, the corresponding status Table 5.24 Low Limit Status Register ADDR. R/W REGISTER B7 B6 B5 B4 B3 B2 B1 B0 DEFAULT 36h R-C Low Limit Status E7 LOW E6 LOW E5 LOW E4 LOW E3 LOW E2 LOW E1 LOW ILOW 00h Table 5.25 THERM Limit Status Register ADDR R/W REGISTER B7 B6 B5 B4 B3 B2 B1 B0 DEFAULT 37h R-C THERM Limit Status E7 THERM E6 THERM E5 THERM E4 THERM E3 THERM E2 THERM E1 THERM I THERM 00h |
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