DAC5571IDBVT datasheet(16/21 Pages) TI

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DAC5571 I2C Update Sequence

DAC5571

SLAS405 – DECEMBER 2003

THEORY OF OPERATION (continued)

The DAC5571 requires a start condition, a valid I

2C address, a control-MSB byte, and an LSB byte for a single

update. After the receipt of each byte, DAC5571 acknowledges by pulling the SDA line low during the high period

of a single clock pulse. A valid I

2C address selects the DAC5571. The CTRL/MSB byte sets the operational

mode of the DAC5571, and the four most significant bits. The DAC5571 then receives the LSB byte containing

four least significant data bits followed by four don't care bits. DAC5571 performs an update on the falling edge

of the acknowledge signal that follows the LSB byte.

For the first update, DAC5571 requires a start condition, a valid I

2C address, a CTRL/MSB byte, an LSB byte.

For all consecutive updates, DAC5571 needs a CTRL/MSB byte, and an LSB byte.

Using the I

2C high-speed mode (f

scl= 3.4 MHz), the clock running at 3.4 MHz, each 8-bit DAC update other than

the first update can be done within 18 clock cycles (CTRL/MSB byte, acknowledge signal, LSB byte,

acknowledge signal), at 188.88 KSPS. Using the fast mode (fscl= 400 kHz), clock running at 400 kHz, maximum

DAC update rate is limited to 22.22 KSPS. Once a stop condition is received, DAC5571 releases the I

2C bus and

awaits a new start condition.

Address Byte

MSB

LSB

The address byte is the first byte received following the START condition from the master device. The first six

bits (MSBs) of the address are factory preset to 100110. The next bit of the address is the device select bit A0.

The A0 address input can be connected to VDD or digital GND, or can be actively driven by TTL/CMOS logic

levels. The device address is set by the state of this pin during the power-up sequence of the DAC5571. Up to

two devices (DAC5571) can be connected to the same I

2C-Bus without requiring additional glue logic.

Broadcast Address Byte

MSB

LSB

Broadcast addressing is also supported by DAC5571. Broadcast addressing can be used for synchronously

updating or powering down multiple DAC5571 devices. Using the broadcast address, DAC5571 responds

regardless of the state of the address pin A0.

Control - Most Significant Byte

Most Significant Byte CTRL/MSB[7:0] consists of two zeros, two power-down bits, and four most significant bits

of 8-bit unsigned binary D/A conversion data.

Least Significant Byte

Least Significant Byte LSB[7:0] consists of the four least significant bits of the 8-bit unsigned binary D/A

conversion data, followed by four don't care bits. DAC5571 updates at the falling edge of the acknowledge signal

that follows the LSB[0] bit.

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