TMS320VC5502 datasheet(2/189 Pages) TI

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Revision History

TMS320VC5502

Fixed-Point Digital Signal Processor

SPRS166H – APRIL 2001 – REVISED NOVEMBER 2004

This data sheet revision history highlights the technical changes made to the SPRS166G device-specific

data sheet to make it an SPRS166H revision.

Scope: Deleted Section 7.1 (Ball Grid Array Mechanical Data) and Section 7.2 (Low-Profile Quad

Flatpack Mechanical Data). Mechanical drawings of the 201-terminal GZZ, 201-terminal ZZZ, and 176-pin

PGF packages will be appended to this document via an automated process.

Added 201-terminal ZZZ package information/data, added Section 4.1 [Notices Concerning JTAG (IEEE

1149.1) Boundary Scan Test Capability], added Section 6.2 (Packaging Information), etc.

ADDITIONS/CHANGES/DELETIONS

Global:

•

added 201-terminal ZZZ package information/data

•

updated title of SPRU146 to "TMS320VC5501/5502/5503/5507/5509 DSP Inter-Integrated Circuit (I2C) Module Reference

Guide"

•

updated title of SPRU592 to "TMS320VC5501/5502/5503/5507/5509/5510 DSP Multichannel Buffered Serial Port (McBSP)

Reference Guide"

•

moved "Package Thermal Resistance Characteristics" section to Chapter 6, Mechanical Data

Section 1.1, Features:

•

added 201-terminal ZZZ package to "Packages" feature

Section 2.2.1:

•

changed title from "Ball Grid Array (GZZ)" to "Ball Grid Array (GZZ and ZZZ)"

•

updated "The TMS320VC5502 is offered in ..." paragraph

Figure 2-1:

•

changed title from "201-Terminal GZZ Ball Grid Array (Bottom View)" to "201-Terminal GZZ and ZZZ Ball Grid Array (Bottom

View)"

Table 2-1:

•

changed title from "201-Terminal GZZ Ball Grid Array Thermal Ball Locations" to "201-Terminal GZZ and ZZZ Ball Grid Array

Thermal Ball Locations"

Table 2-2:

•

changed title from "201-Terminal GZZ Ball Grid Array Ball Assignments" to "201-Terminal GZZ and ZZZ Ball Grid Array Ball

Assignments"

Table 2-4, Signal Descriptions:

•

updated FUNCTION of HCS, HDS1, HDS2, and HPIENA

Figure 3-2, TMS320VC5502 Memory Map:

•

added "Byte Address" above addresses

•

added footnote about CE space size

Updated Section 3.8, Host-Port Interface (HPI)

Section 3.10.6, Reset Sequence:

•

updated "After all internal delay cycles have expired, ..." bulleted item

Table 3-57, Peripheral Bus Controller Configuration Registers:

•

added Time-Out Control Register (TOCR) at 0x9000

Chapter 4, Support:

•

added Section 4.1, Notices Concerning JTAG (IEEE 1149.1) Boundary Scan Test Capability

•

added Section 4.1.1, Initialization Requirements for Boundary Scan Test

•

added Section 4.1.2, Boundary Scan Description Language (BSDL) Model

Section 4.2, Documentation Support:

•

updated title of SPRU146 to "TMS320VC5501/5502/5503/5507/5509 DSP Inter-Integrated Circuit (I2C) Module Reference

Guide"

•

updated title of SPRU592 to "TMS320VC5501/5502/5503/5507/5509/5510 DSP Multichannel Buffered Serial Port (McBSP)

Reference Guide"

Revision History

TMS320VC5502 Datenblatt(PDF) 2 Page - Texas Instruments

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