PCA9554DB datasheet(6/20 Pages) PHILIPS

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Philips Semiconductors

Product data sheet

PCA9554/PCA9554A

8-bit I2C and SMBus I/O port with interrupt

2004 Sep 30

SIMPLIFIED SCHEMATIC OF I/O0 TO I/O7

WRITE PULSE

DATA FROM

SHIFT REGISTER

VDD

I/O0 TO I/O7

VSS

WRITE

CONFIGURATION

PULSE

INPUT PORT

POLARITY

INVERSION

OUTPUT

PORT

DATA FROM

SHIFT REGISTER

DATA FROM

SHIFT REGISTER

WRITE

POLARITY

PULSE

CONFIGURATION

OUTPUT PORT

INPUT PORT

POLARITY

READ PULSE

SU01472

TO INT

100 k

Ω

NOTE:

At Power-on Reset, all registers return to default values.

Figure 4. Simplified schematic of I/O0 to I/O7

I/O port

When an I/O is configured as an input, FETs Q1 and Q2 are off,

creating a high-impedance input with a weak pull-up (100 k

Ω typ.) to

VDD. The input voltage may be raised above VDD to a maximum of

5.5 V.

If the I/O is configured as an output, then either Q1 or Q2 is enabled,

depending on the state of the output port register. Care should be

exercised if an external voltage is applied to an I/O configured as an

output because of the low impedance paths that exist between the

pin and either VDD or VSS.

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