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AUIRLS4030-7P Datenblatt(PDF) 2 Page - Infineon Technologies AG

Teilenummer AUIRLS4030-7P
Bauteilbeschribung  AUTOMOTIVE GRADE
PDF  10 Pages
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Hersteller  INFINEON [Infineon Technologies AG]
Direct Link  http://www.infineon.com
Logo INFINEON - Infineon Technologies AG

AUIRLS4030-7P Datenblatt(HTML) 2 Page - Infineon Technologies AG

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AUIRLS4030-7P
2
2015-11-6
Notes:
Repetitive rating; pulse width limited by max. junction temperature.
Limited by TJmax, starting TJ = 25°C, L = 0.05mH, RG = 25, IAS = 110A, VGS =10V. Part not recommended for use above this value.
ISD 110A, di/dt 1520A/µs, VDD V(BR)DSS, TJ  175°C.
Pulse width
400µs; duty cycle  2%.
Coss eff. (TR) is a fixed capacitance that gives the same charging time as Coss while VDS is rising from 0 to 80% VDSS.
Coss eff. (ER) is a fixed capacitance that gives the same energy as Coss while VDS is rising from 0 to 80% VDSS.
When mounted on 1" square PCB (FR-4 or G-10 Material). For recommended footprint and soldering techniques refer to
application note #AN-994
Ris measured at TJ approximately 90°C.

RJC value shown is at time zero.
Static @ TJ = 25°C (unless otherwise specified)
Parameter
Min. Typ. Max. Units
Conditions
V(BR)DSS
Drain-to-Source Breakdown Voltage
100
–––
–––
V
VGS = 0V, ID = 250µA
V(BR)DSS/TJ Breakdown Voltage Temp. Coefficient
–––
0.10
–––
V/°C Reference to 25°C, ID = 5mA 
RDS(on)
Static Drain-to-Source On-Resistance
–––
3.2
3.9
m

VGS = 10V, ID = 110A 
–––
3.3
4.1
VGS = 4.5V, ID = 94A 
VGS(th)
Gate Threshold Voltage
1.0
–––
2.5
V
VDS = VGS, ID = 250µA
gfs
Forward Trans conductance
250
–––
–––
S
VDS = 25V, ID = 110A
IDSS
Drain-to-Source Leakage Current
–––
–––
20
µA
VDS = 100V, VGS = 0V
–––
–––
250
VDS = 100V,VGS = 0V,TJ =125°C
IGSS  
Gate-to-Source Forward Leakage
–––
–––
100
nA  
VGS = 16V
Gate-to-Source Reverse Leakage
–––
–––
-100
VGS = -16V
RG
Internal Gate Resistance
–––
2.0
–––

Dynamic Electrical Characteristics @ TJ = 25°C (unless otherwise specified)
Qg
Total Gate Charge
–––
93
140
nC  
ID = 110A
Qgs
Gate-to-Source Charge
–––
27
–––
VDS = 50V
Qgd
Gate-to-Drain Charge
–––
43
–––
VGS = 4.5V
Qsync
Total Gate Charge Sync. (Qg - Qgd)
–––
50
–––
td(on)
Turn-On Delay Time
–––
53
–––
ns
VDD = 65V
tr
Rise Time
–––
160
–––
ID = 110A
td(off)
Turn-Off Delay Time
–––
110
–––
RG= 2.7
tf
Fall Time
–––
87
–––
VGS = 4.5V
Ciss
Input Capacitance
––– 11490 –––
pF  
VGS = 0V
Coss
Output Capacitance
–––
680
–––
VDS = 50V
Crss
Reverse Transfer Capacitance
–––
300
–––
ƒ = 1.0MHz
Coss eff.(ER)
Effective Output Capacitance (Energy Related)
–––
760
–––
VGS = 0V, VDS = 0V to 80V
Coss eff.(TR)
Effective Output Capacitance (Time Related)
–––
1170 –––
VGS = 0V, VDS = 0V to 80V
Diode Characteristics  
Parameter
Min. Typ. Max. Units
Conditions
IS
Continuous Source Current
–––
–––
190
A
MOSFET symbol
(Body Diode)
showing the
ISM
Pulsed Source Current
–––
–––
750
integral reverse
(Body Diode)
p-n junction diode.
VSD
Diode Forward Voltage
–––
–––
1.3
V
TJ = 25°C,IS = 110A,VGS = 0V 
trr
Reverse Recovery Time
–––
53
–––
ns
TJ = 25°C
VDD = 85V
–––
63
–––
TJ = 125°C
IF = 110A,
Qrr
Reverse Recovery Charge
–––
99
–––
nC
TJ = 25°C
di/dt = 100A/µs 
–––
155
–––
TJ = 125°C
 
IRRM
Reverse Recovery Current
–––
3.3
–––
A
TJ = 25°C
ton
Forward Turn-On Time
Intrinsic turn-on time is negligible (turn-on is dominated by LS+LD)



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